2018-11-08 13:31:28 +01:00
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/*******************************************************************************
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* Copyright (C) 2017, 2018 MINRES Technologies GmbH
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*******************************************************************************/
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2017-10-04 10:31:11 +02:00
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#ifndef _CLINT_H_
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#define _CLINT_H_
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2017-10-04 14:30:25 +02:00
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#include "scc/tlm_target.h"
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2019-06-28 20:59:16 +02:00
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#include <tlm_core/tlm_1/tlm_req_rsp/tlm_1_interfaces/tlm_core_ifs.h>
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2017-10-04 10:31:11 +02:00
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namespace iss {
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namespace arch {
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2017-10-12 22:41:37 +02:00
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template <typename BASE> class riscv_hart_msu_vp;
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2017-10-04 10:31:11 +02:00
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}
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}
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namespace sysc {
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class clint_regs;
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namespace SiFive {
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class core_complex;
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}
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2019-06-28 20:59:16 +02:00
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class clint : public sc_core::sc_module, public scc::tlm_target<>, public tlm::tlm_peek_if<uint64_t> {
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2017-10-04 10:31:11 +02:00
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public:
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2018-07-12 15:27:36 +02:00
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sc_core::sc_in<sc_core::sc_time> tlclk_i;
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sc_core::sc_in<sc_core::sc_time> lfclk_i;
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2017-10-04 10:31:11 +02:00
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sc_core::sc_in<bool> rst_i;
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sc_core::sc_out<bool> mtime_int_o;
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sc_core::sc_out<bool> msip_int_o;
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2019-06-28 20:59:16 +02:00
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sc_core::sc_export<tlm::tlm_peek_if<uint64_t>> mtime_i{"mtime_i"};
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2017-10-04 10:31:11 +02:00
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clint(sc_core::sc_module_name nm);
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2018-11-08 13:31:28 +01:00
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virtual ~clint() override; // NOLINT // need to keep it in source file because of fwd declaration of clint_regs
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2017-10-04 10:31:11 +02:00
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protected:
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void clock_cb();
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void reset_cb();
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2019-06-28 20:59:16 +02:00
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void mtime_evt_cb();
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void update_mtime(bool force = false);
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uint64_t peek( tlm::tlm_tag<uint64_t> *t = 0 ) const override;
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bool nb_peek( uint64_t &t ) const override;
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bool nb_can_peek( tlm::tlm_tag<uint64_t> *t = 0 ) const override;
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const sc_core::sc_event &ok_to_peek( tlm::tlm_tag<uint64_t> *t = 0 ) const override;
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2017-10-04 10:31:11 +02:00
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sc_core::sc_time clk, last_updt;
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unsigned cnt_fraction;
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std::unique_ptr<clint_regs> regs;
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2019-06-28 20:59:16 +02:00
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sc_core::sc_event mtime_evt, dummy_evt;
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2017-10-04 10:31:11 +02:00
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};
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} /* namespace sysc */
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#endif /* _CLINT_H_ */
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