HIFIVE1-VP/platform/incl/sysc/SiFive/fe310.h

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 * Copyright (C) 2017, 2018 MINRES Technologies GmbH
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 * 2. Redistributions in binary form must reproduce the above copyright notice,
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 *    may be used to endorse or promote products derived from this software
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#ifndef _PLATFORM_H_
#define _PLATFORM_H_

#include "aon.h"
#include "clint.h"
#include "gpio.h"
#include "plic.h"
#include "prci.h"
#include "pwm.h"
#include "spi.h"
#include "sysc/core_complex.h"
#include "uart.h"

#include "cci_configuration"
#include "scc/memory.h"
#include "scc/router.h"
#include "scc/utilities.h"
#include "tlm/scc/tlm_signal_sockets.h"
#include <array>
#include <memory>
#include <sysc/kernel/sc_module.h>

namespace sysc {

class fe310 : public sc_core::sc_module {
public:
    SC_HAS_PROCESS(fe310);// NOLINT

    sc_core::sc_vector<tlm::scc::tlm_signal_initiator_socket<sc_dt::sc_logic>> pins_o;
    sc_core::sc_vector<tlm::scc::tlm_signal_target_socket<sc_dt::sc_logic>> pins_i;

    sc_core::sc_in<bool> erst_n;

    fe310(sc_core::sc_module_name nm);

    cci::cci_param<bool> use_rtl;

private:
    std::unique_ptr<SiFive::core_complex> i_core_complex;
    std::unique_ptr<scc::router<>> i_router;
    std::unique_ptr<uart> i_uart0, i_uart1;
    std::unique_ptr<spi> i_qspi0, i_qspi1, i_qspi2;
    std::unique_ptr<pwm> i_pwm0, i_pwm1, i_pwm2;
    std::unique_ptr<gpio> i_gpio0;
    std::unique_ptr<plic> i_plic;
    std::unique_ptr<aon> i_aon;
    std::unique_ptr<prci> i_prci;
    std::unique_ptr<clint> i_clint;

    using mem_qspi_t = scc::memory<512_MB, 32>;
    std::unique_ptr<mem_qspi_t> i_mem_qspi;
    using mem_ram_t = scc::memory<128_kB, 32>;
    std::unique_ptr<mem_ram_t> i_mem_ram;

    sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> s_tlclk;
    sc_core::sc_signal<sc_core::sc_time, sc_core::SC_MANY_WRITERS> s_lfclk;
    
    sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_rst, s_mtime_int, s_msie_int;
    
    sc_core::sc_vector<sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS>> s_global_int, s_local_int;
    sc_core::sc_signal<bool, sc_core::SC_MANY_WRITERS> s_core_int;
    
    sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_in> s_dummy_sck_i;
    sc_core::sc_vector<tlm::scc::tlm_signal_bool_opt_out> s_dummy_sck_o;

protected:
    void gen_reset();

#include "gen/e300_plat_t.h"
};

} /* namespace sysc */

#endif /* _PLATFORM_H_ */