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fixes wrong path specs

This commit is contained in:
Eyck Jentzsch 2023-04-04 10:31:16 +02:00
parent f8306b2473
commit c22e85d30d
2 changed files with 3 additions and 2 deletions
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3
cmake/CodeGen.cmake
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@ -69,16 +69,17 @@ if(ENABLE_CODEGEN AND EXISTS ${GENERATOR_JAR})
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}.cpp") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}.cpp")
#list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_decoder.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}_decoder.cpp") #list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_decoder.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}_decoder.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp")
set(${CORE_NAME}_OUTPUT_FILES ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h ${DBT_CORE_TGC_DIR}/src/iss/${CORE_NAMEL}.cpp ${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp)
else() else()
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.h") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.h")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.cpp") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.cpp")
#list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_decoder.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}_decoder.cpp") #list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_decoder.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}_decoder.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/vm/interp/vm_${CORE_NAMEL}.cpp") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/vm/interp/vm_${CORE_NAMEL}.cpp")
set(${CORE_NAME}_OUTPUT_FILES ${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.h ${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.cpp ${DBT_CORE_TGC_DIR}/src-gen/vm/interp/vm_${CORE_NAMEL}.cpp)
endif() endif()
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_instr.yaml.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_instr.yaml") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_instr.yaml.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_instr.yaml")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_cyles.txt.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_cycles.json:no") list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_cyles.txt.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_cycles.json:no")
set(${CORE_NAME}_OUTPUT_FILES ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h ${DBT_CORE_TGC_DIR}/src/iss/${CORE_NAMEL}.cpp ${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp)
if(NOT DEFINED ENV{CI}) if(NOT DEFINED ENV{CI})
add_custom_target(${CORE_NAME}_cpp add_custom_target(${CORE_NAME}_cpp
COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} ${${CORE_NAME}_MAPPING} ${INPUT_FILE} COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} ${${CORE_NAME}_MAPPING} ${INPUT_FILE}

2
dbt-rise-core

@ -1 +1 @@
Subproject commit 8a2fe18cba1e799aebd018d0d5434fb00d94b29f Subproject commit e13d09fd391ed32e30830f8b16a6119e6953fe50