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update to pull in unified src layout

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This commit is contained in:
Eyck Jentzsch
2022-05-30 07:49:50 +02:00
parent 56435e44ec
commit 8da5dc278d
5 changed files with 47 additions and 105 deletions
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82
cmake/CodeGen.cmake
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@ -60,48 +60,54 @@ set(REPO_DIR ${DBT_CORE_TGC_DIR}/gen_input/CoreDSL-Instruction-Set-Description)
set(TMPL_DIR ${DBT_CORE_TGC_DIR}/gen_input/templates/)
if(ENABLE_CODEGEN AND EXISTS ${GENERATOR_JAR})
macro(gen_coredsl CORE_NAME INPUT_FILE BACKEND)
message(STATUS "Adding generation steps for ${CORE_NAME} in ${DBT_CORE_TGC_DIR} for ${BACKEND}")
string(TOUPPER ${BACKEND} BE_UPPER)
string(TOLOWER ${CORE_NAME} CORE_NAMEL)
macro(gen_coredsl CORE_NAME INPUT_FILE BACKEND)
message(STATUS "Adding generation steps for ${CORE_NAME} in ${DBT_CORE_TGC_DIR} for ${BACKEND}")
string(TOUPPER ${BACKEND} BE_UPPER)
string(TOLOWER ${CORE_NAME} CORE_NAMEL)
if(EXISTS ${DBT_CORE_TGC_DIR}/generate.sh AND NOT EXISTS ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h)
# make sure source file exist initially
execute_process(
COMMAND /bin/bash ${DBT_CORE_TGC_DIR}/../generate.sh -c $CORE_NAME -b $BACKEND
WORKING_DIRECTORY ${DBT_CORE_TGC_DIR}/..
RESULT_VARIABLE return_code)
endif()
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/${CORE_NAMEL}.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_instr.yaml.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_instr.yaml")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_cyles.txt.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_cycles.json:no")
set(${CORE_NAME}_OUTPUT_FILES ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h ${DBT_CORE_TGC_DIR}/src/iss/${CORE_NAMEL}.cpp ${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp)
#add_custom_command(
# COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} -r ${REPO_DIR} ${${CORE_NAME}_MAPPING} ${INPUT_FILE}
# DEPENDS ${GENERATOR_JAR} ${INPUT_FILE} ${TMPL_DIR}/CORENAME.h.gtl ${TMPL_DIR}/CORENAME.cpp.gtl ${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl
# OUTPUT ${${CORE_NAME}_OUTPUT_FILES}
# COMMENT "Generating code for ${CORE_NAME}."
# USES_TERMINAL VERBATIM
#)
if(NOT DEFINED ENV{CI})
add_custom_target(${CORE_NAME}_cpp
COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} ${${CORE_NAME}_MAPPING} ${INPUT_FILE}
WORKING_DIRECTORY ${CMAKE_CURRENT_LIST_DIR}
COMMENT "Generating ISS sources"
BYPRODUCTS ${${CORE_NAME}_OUTPUT_FILES}
USES_TERMINAL
)
endif()
if(EXISTS ${DBT_CORE_TGC_DIR}/generate.sh AND NOT EXISTS ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h)
# make sure source file exist initially
execute_process(
COMMAND /bin/bash ${DBT_CORE_TGC_DIR}/../generate.sh -c $CORE_NAME -b $BACKEND
WORKING_DIRECTORY ${DBT_CORE_TGC_DIR}/..
RESULT_VARIABLE return_code)
endif()
if(${CORE_NAME} =="TGC_C")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}.h")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/iss/arch/${CORE_NAMEL}.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp")
else()
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.h.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.h")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/iss/arch/${CORE_NAMEL}.cpp")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl:${DBT_CORE_TGC_DIR}/src-gen/vm/interp/vm_${CORE_NAMEL}.cpp")
endif()
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_instr.yaml.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_instr.yaml")
list(APPEND ${CORE_NAME}_MAPPING -m "${TMPL_DIR}/CORENAME_cyles.txt.gtl:${DBT_CORE_TGC_DIR}/${CORE_NAME}_cycles.json:no")
set(${CORE_NAME}_OUTPUT_FILES ${DBT_CORE_TGC_DIR}/incl/iss/arch/${CORE_NAMEL}.h ${DBT_CORE_TGC_DIR}/src/iss/${CORE_NAMEL}.cpp ${DBT_CORE_TGC_DIR}/src/vm/interp/vm_${CORE_NAMEL}.cpp)
#add_custom_command(
# COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} -r ${REPO_DIR} ${${CORE_NAME}_MAPPING} ${INPUT_FILE}
# DEPENDS ${GENERATOR_JAR} ${INPUT_FILE} ${TMPL_DIR}/CORENAME.h.gtl ${TMPL_DIR}/CORENAME.cpp.gtl ${TMPL_DIR}/${BACKEND}/CORENAME.cpp.gtl
# OUTPUT ${${CORE_NAME}_OUTPUT_FILES}
# COMMENT "Generating code for ${CORE_NAME}."
# USES_TERMINAL VERBATIM
#)
if(NOT DEFINED ENV{CI})
add_custom_target(${CORE_NAME}_cpp
COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} ${${CORE_NAME}_MAPPING} ${INPUT_FILE}
WORKING_DIRECTORY ${CMAKE_CURRENT_LIST_DIR}
RESULT_VARIABLE return_code)
endmacro()
COMMENT "Generating ISS sources"
BYPRODUCTS ${${CORE_NAME}_OUTPUT_FILES}
USES_TERMINAL
)
endif()
execute_process(
COMMAND ${GENERATOR} -b ${BE_UPPER} -c ${CORE_NAME} ${${CORE_NAME}_MAPPING} ${INPUT_FILE}
WORKING_DIRECTORY ${CMAKE_CURRENT_LIST_DIR}
RESULT_VARIABLE return_code)
endmacro()
else()
macro(gen_coredsl CORE_NAME INPUT_FILE BACKEND)
add_custom_target(${CORE_NAME}_cpp)