Add Longnail complete command
This commit is contained in:
@@ -11,5 +11,6 @@ object Global {
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lazy val LONGNAIL: Path = HAMMER / "deps" / "longnail"
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lazy val BASE_DIR: Path = os.pwd
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lazy val OUT_DIR: Path = Main.conf.outputDirectory()
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lazy val TMP_DIR: Path = OUT_DIR / "tmp"
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lazy val CORE_DATASHEETS: Path = HAMMER / "coreDatasheets"
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}
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@@ -6,6 +6,7 @@ import com.minres.tgc.hammer.FileUtils.*
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class HammerConf(arguments: Seq[String]) extends ScallopConf(arguments) {
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val outputDirectory: ScallopOption[Path] = opt[Path](default = Some("output".path()), descr = "The base output directory")
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addSubcommand(new LongnailCommand)
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addSubcommand(new TreenailCommand)
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addSubcommand(new LongnailSchedCommand)
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@@ -0,0 +1,44 @@
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package com.minres.tgc.hammer.cli
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import com.minres.tgc.hammer.FileUtils.*
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import com.minres.tgc.hammer.Global.*
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import com.minres.tgc.hammer.tasks.{Task, TreenailTask}
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import com.minres.tgc.hammer.tasks.longnail.{LongnailHLSTask, LongnailMergeTask, LongnailScheduleTask, SchedulingParameters}
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import org.rogach.scallop.*
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import os.Path
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import scala.collection.mutable
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class LongnailCommand extends MySubcommand("isaxHLS") with CoreSelection {
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val inputFiles: ScallopOption[List[Path]] = trailArg[List[Path]]("inputFiles", group = mainGroup, descr = "One or multiple input files; Both .core_desc as well as .mlir are supported (also mixed)")
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val useMinIISolution: ScallopOption[Boolean] = toggle(name = "useMinIISolution", group = mainGroup, default = Some(false), descrYes = "Whether to automatically choose the scheduling solution with the lowest II. If not activated, a manual selection during execution will be required!")
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val schedParams: SchedulingParameters = addConfigElement(new SchedulingParameters)
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banner(
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"""Run the complete longnail flow from CoreDSL/MLIR to receive a SystemVerilog representation of the ISAXes
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|Usage: tgc-hammer isaxHLS -c VexRiscv --useMinIISolution isax.core_desc
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|""".stripMargin)
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override def getRequiredTasks: Seq[Task] = {
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val tasks = mutable.ListBuffer[Task]()
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val (coreDSLFiles, mlirFiles) = inputFiles().partition(_.ext == "core_desc")
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val treenailTasks = coreDSLFiles.map(i => TreenailTask(i, TMP_DIR / s"${i.baseName}.mlir"))
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tasks ++= treenailTasks
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val allMlirFiles = mlirFiles ++ treenailTasks.map(_.output)
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if (allMlirFiles.size == 1) {
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tasks += LongnailScheduleTask(allMlirFiles.head, getCoreDatasheet, schedParams)
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} else {
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val mergedInput = TMP_DIR / "merged.mlir"
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val concatInput = TMP_DIR / "concat.mlir"
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tasks += LongnailMergeTask(allMlirFiles, concatInput, mergedInput)
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tasks += LongnailScheduleTask(mergedInput, getCoreDatasheet, schedParams)
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}
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if (useMinIISolution()) {
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tasks += LongnailHLSTask(schedParams.schedulingSolutionFile(), None, OUT_DIR)
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} else {
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???
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}
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tasks.toSeq
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}
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}
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@@ -1,5 +0,0 @@
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package com.minres.tgc.hammer.cli
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class LongnailHLSCommand {
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}
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@@ -1,5 +1,31 @@
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package com.minres.tgc.hammer.cli
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class LongnailMergeCommand {
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import com.minres.tgc.hammer.tasks.{CopyTask, Task, TreenailTask}
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import org.rogach.scallop.*
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import os.Path
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import com.minres.tgc.hammer.FileUtils.*
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import com.minres.tgc.hammer.Global.*
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import com.minres.tgc.hammer.tasks.longnail.LongnailMergeTask
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class LongnailMergeCommand extends MySubcommand("mergeISAX") {
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val inputFiles: ScallopOption[List[Path]] = trailArg[List[Path]]("inputFiles", group = mainGroup, descr = "One or multiple input files; Both .core_desc as well as .mlir are supported (also mixed)")
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val output: ScallopOption[Path] = opt[Path](short = 'o', default = Some("merged.mlir".path()), descr = "The .mlir file containing the merged ISAXes")
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override def getRequiredTasks: Seq[Task] = {
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val (coreDSLFiles, mlirFiles) = inputFiles().partition(_.ext == "core_desc")
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if (inputFiles().size == 1) {
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if (coreDSLFiles.size == 1) {
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Seq(TreenailTask(coreDSLFiles.head, output()))
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} else {
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Seq(CopyTask(mlirFiles.head, output()))
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}
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} else {
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val treenailTasks = coreDSLFiles.map(i => TreenailTask(i, TMP_DIR / s"${i.baseName}.mlir"))
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val allMlirFiles = mlirFiles ++ treenailTasks.map(_.output)
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val concatInput = TMP_DIR / "concat.mlir"
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treenailTasks :+ LongnailMergeTask(allMlirFiles, concatInput, output())
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}
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}
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}
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@@ -20,13 +20,13 @@ class LongnailSchedCommand extends MySubcommand("scheduleISAX") with CoreSelecti
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override def getRequiredTasks: Seq[Task] = {
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val (coreDSLFiles, mlirFiles) = inputFiles().partition(_.ext == "core_desc")
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val treenailTasks = coreDSLFiles.map(i => TreenailTask(i, changeExtension(i, "mlir")))
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val treenailTasks = coreDSLFiles.map(i => TreenailTask(i, TMP_DIR / s"${i.baseName}.mlir"))
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val allMlirFiles = mlirFiles ++ treenailTasks.map(_.output)
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if (allMlirFiles.size == 1) {
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treenailTasks :+ LongnailScheduleTask(allMlirFiles.head, getCoreDatasheet, schedParams)
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} else {
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val mergedInput = OUT_DIR / "merged.mlir"
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val concatInput = OUT_DIR / "concat.mlir"
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val mergedInput = TMP_DIR / "merged.mlir"
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val concatInput = TMP_DIR / "concat.mlir"
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treenailTasks :+ LongnailMergeTask(allMlirFiles, concatInput, mergedInput) :+ LongnailScheduleTask(mergedInput, getCoreDatasheet, schedParams)
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}
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}
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@@ -13,7 +13,7 @@ trait BaseOption[T](using conv: ValueConverter[T]) extends ConfigElement {
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}
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def get: T = scallop()
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def apply: T = get
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def apply(): T = get
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def getToolParameters: Seq[Shellable] = if (scallop.isDefined) Seq(s"$toolName", getToolArg) else Seq()
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@@ -0,0 +1,13 @@
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package com.minres.tgc.hammer.tasks
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import os.*
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case class CopyTask(from: Path, to: Path) extends Task {
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override def validate(): Unit = {
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}
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override def execute(): Unit = {
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copy(from, to)
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}
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}
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@@ -2,17 +2,16 @@ package com.minres.tgc.hammer.tasks.longnail
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import os.Path
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class LongnailHLSTask(schedulingFile: Option[Path], outDirectory: Path) extends LongnailBaseTask {
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class LongnailHLSTask(schedulingSolutionFile: Path, schedulingSelectionFile: Option[Path], outDirectory: Path) extends LongnailBaseTask {
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override def validate(): Unit = {
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super.validate()
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}
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override def execute(): Unit = {
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runExecutable(EXECUTABLE,
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"--lower-lil-to-hw",
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schedulingFile match {
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case Some(value) => s"--solutionSelection $value"
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case None => "--forceUseMinIISolution=true"
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schedulingSelectionFile match {
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case Some(value) => s"--lower-lil-to-hw=solutionSelection=$value"
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case None => "--lower-lil-to-hw=forceUseMinIISolution=true"
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},
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"--simplify-structure",
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"--cse",
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@@ -22,8 +21,8 @@ class LongnailHLSTask(schedulingFile: Option[Path], outDirectory: Path) extends
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"--hw-cleanup",
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"--prettify-verilog",
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"--hw-legalize-modules",
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"--export-split-verilog",
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"--dir-name", outDirectory
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s"--export-split-verilog=dir-name=$outDirectory",
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schedulingSolutionFile
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)
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}
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}
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@@ -26,5 +26,5 @@ class SchedulingParameters extends OptionGroup {
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})
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value[Int](cliName = "--maxLoopUnrollFactor", toolName = "max-unroll-factor", default = Some(16), descr = "Longnail max loop unroll factor")
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value[Path](cliName = "--schedulingMLIR", toolName = "o", default = Some(OUT_DIR / "scheduling_solutions.mlir"), descr = "Output file with different scheduling solutions")
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val schedulingSolutionFile: ValueOption[Path] = value[Path](cliName = "--schedulingMLIR", toolName = "o", default = Some(OUT_DIR / "scheduling_solutions.mlir"), descr = "Output file with different scheduling solutions")
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}
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