Fixed code generation to use sc_register_indexed
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e719dc1118
commit
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@ -28,7 +28,7 @@
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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// POSSIBILITY OF SUCH DAMAGE.
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//
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//
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// Created on: Wed Sep 20 11:47:24 CEST 2017
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// Created on: Wed Sep 20 22:30:45 CEST 2017
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// * plic_regs.h Author: <RDL Generator>
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// * plic_regs.h Author: <RDL Generator>
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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@ -51,7 +51,7 @@ protected:
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// storage declarations
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// storage declarations
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BEGIN_BF_DECL(priority_t, uint32_t);
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BEGIN_BF_DECL(priority_t, uint32_t);
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BF_FIELD(priority, 0, 3);
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BF_FIELD(priority, 0, 3);
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END_BF_DECL();
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END_BF_DECL() ;
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std::array<priority_t, 255> r_priority;
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std::array<priority_t, 255> r_priority;
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uint32_t r_pending;
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uint32_t r_pending;
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@ -65,7 +65,7 @@ protected:
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uint32_t r_claim_complete;
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uint32_t r_claim_complete;
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// register declarations
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// register declarations
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sysc::sc_register_field<priority_t, 255> priority;
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sysc::sc_register_indexed<priority_t, 255> priority;
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sysc::sc_register<uint32_t> pending;
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sysc::sc_register<uint32_t> pending;
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sysc::sc_register<uint32_t> enabled;
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sysc::sc_register<uint32_t> enabled;
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sysc::sc_register<threshold_t> threshold;
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sysc::sc_register<threshold_t> threshold;
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@ -28,7 +28,7 @@
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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// POSSIBILITY OF SUCH DAMAGE.
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//
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//
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// Created on: Wed Sep 20 11:47:24 CEST 2017
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// Created on: Wed Sep 20 22:30:45 CEST 2017
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// * spi_regs.h Author: <RDL Generator>
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// * spi_regs.h Author: <RDL Generator>
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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@ -28,7 +28,7 @@
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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// POSSIBILITY OF SUCH DAMAGE.
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// POSSIBILITY OF SUCH DAMAGE.
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//
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//
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// Created on: Wed Sep 20 11:47:24 CEST 2017
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// Created on: Wed Sep 20 22:30:45 CEST 2017
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// * uart_regs.h Author: <RDL Generator>
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// * uart_regs.h Author: <RDL Generator>
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//
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//
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////////////////////////////////////////////////////////////////////////////////
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////////////////////////////////////////////////////////////////////////////////
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@ -91,9 +91,9 @@ protected:
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sysc::sc_register<rxdata_t> rxdata;
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sysc::sc_register<rxdata_t> rxdata;
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sysc::sc_register<txctrl_t> txctrl;
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sysc::sc_register<txctrl_t> txctrl;
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sysc::sc_register<rxctrl_t> rxctrl;
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sysc::sc_register<rxctrl_t> rxctrl;
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sysc::sc_register<ie_t> ie;
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sysc::sc_register<ie_t> ie;
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sysc::sc_register<ip_t> ip;
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sysc::sc_register<ip_t> ip;
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sysc::sc_register<div_t> div;
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sysc::sc_register<div_t> div;
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public:
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public:
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uart_regs(sc_core::sc_module_name nm);
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uart_regs(sc_core::sc_module_name nm);
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@ -1 +1 @@
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Subproject commit 0ae9ca921a3c59f7f5e0cad119314e65bd50c327
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Subproject commit 4bc26642e349906f6e81619ea8a26bf533c3f46f
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