SystemC/SystemC-Components-Test
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Updated to work with latest sc-components

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This commit is contained in:
Eyck Jentzsch
2018-09-29 20:01:11 +02:00
parent d92279f100
commit 7032b187f0
10 changed files with 307 additions and 71 deletions
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1
examples/transaction_recording/CMakeLists.txt
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@@ -11,5 +11,6 @@ target_link_libraries (transaction_recording LINK_PUBLIC sc-components)
target_link_libraries (transaction_recording LINK_PUBLIC ${SystemC_LIBRARIES})
target_link_libraries (transaction_recording LINK_PUBLIC ${SCV_LIBRARIES})
target_link_libraries (transaction_recording LINK_PUBLIC ${Boost_LIBRARIES} )
target_link_libraries (transaction_recording LINK_PUBLIC ${ZLIB_LIBRARIES} )
target_link_libraries (transaction_recording LINK_PUBLIC ${CMAKE_THREAD_LIBS_INIT})
target_link_libraries (transaction_recording LINK_PUBLIC ${CMAKE_DL_LIBS})

53
examples/transaction_recording/scv_tr_recording_example.cpp
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@@ -16,6 +16,14 @@
*****************************************************************************/
#include "scv.h"
#include "scc/scv_tr_db.h"
#include "scc/report.h"
//47ms #define SQLITE_DB
//27ms
#define CTXT_DB
//29ms #define BINARY_DB
//27ms TEXT_DB
// hack to fake a true fifo_mutex
#define fifo_mutex sc_mutex
@@ -189,8 +197,7 @@ inline void test::main1() {
for (int i = 0; i < 3; i++) {
rw_task_if::addr_t addr = i;
rw_task_if::data_t data = transactor->read(&addr);
cout << "at time " << sc_time_stamp() << ": ";
cout << "received data : " << data << endl;
SCINFO(sc_get_current_object()->name()) << "received data : " << data;
}
scv_smart_ptr<rw_task_if::addr_t> addr;
@@ -198,14 +205,14 @@ inline void test::main1() {
addr->next();
rw_task_if::data_t data = transactor->read(addr->get_instance());
cout << "data for address " << *addr << " is " << data << endl;
SCINFO(sc_get_current_object()->name()) << "data for address " << *addr << " is " << data;
}
scv_smart_ptr<rw_task_if::write_t> write;
for (int i = 0; i < 3; i++) {
write->next();
transactor->write(write->get_instance());
cout << "send data : " << write->data << endl;
SCINFO(sc_get_current_object()->name()) << "send data : " << write->data;
}
scv_smart_ptr<int> data;
@@ -224,8 +231,7 @@ inline void test::main2() {
for (int i = 0; i < 3; i++) {
rw_task_if::addr_t addr = i;
rw_task_if::data_t data = transactor->read(&addr);
cout << "at time " << sc_time_stamp() << ": ";
cout << "received data : " << data << endl;
SCINFO(sc_get_current_object()->name()) << "received data : " << data;
}
scv_smart_ptr<rw_task_if::addr_t> addr;
@@ -233,14 +239,14 @@ inline void test::main2() {
addr->next();
rw_task_if::data_t data = transactor->read(addr->get_instance());
cout << "data for address " << *addr << " is " << data << endl;
SCINFO(sc_get_current_object()->name()) << "data for address " << *addr << " is " << data;
}
scv_smart_ptr<rw_task_if::write_t> write;
for (int i = 0; i < 3; i++) {
write->next();
transactor->write(write->get_instance());
cout << "send data : " << write->data << endl;
SCINFO(sc_get_current_object()->name()) << "send data : " << write->data;
}
scv_smart_ptr<int> data;
@@ -291,8 +297,7 @@ inline void design::addr_phase() {
outstandingAddresses.push_back(_addr);
outstandingType.push_back(_rw);
cout << "at time " << sc_time_stamp() << ": ";
cout << "received request for memory address " << _addr << endl;
SCINFO(sc_get_current_object()->name()) << "received request for memory address " << _addr;
}
}
@@ -306,15 +311,15 @@ inline void design::data_phase() {
wait(clk->posedge_event());
}
if (outstandingType.front() == false) {
cout << "reading memory address " << outstandingAddresses.front() << " with value "
<< memory[outstandingAddresses.front().to_ulong()] << endl;
SCINFO(sc_get_current_object()->name()) << "reading memory address " << outstandingAddresses.front() << " with value "
<< memory[outstandingAddresses.front().to_ulong()];
bus_data = memory[outstandingAddresses.front().to_ulong()];
data_rdy = 1;
wait(clk->posedge_event());
data_rdy = 0;
} else {
cout << "writing memory address " << outstandingAddresses.front() << " with value " << bus_data << endl;
SCINFO(sc_get_current_object()->name()) << "writing memory address " << outstandingAddresses.front() << " with value " << bus_data;
memory[outstandingAddresses.front().to_ulong()] = bus_data;
data_rdy = 1;
wait(clk->posedge_event());
@@ -324,17 +329,25 @@ inline void design::data_phase() {
outstandingType.pop_front();
}
}
extern void scv_tr_binary_init();
int sc_main(int argc, char *argv[]) {
auto start = std::chrono::system_clock::now();
scv_startup();
scc::init_logging(logging::INFO);
LOGGER(SystemC)::print_time() = false;
#if 0
scv_tr_text_init();
const char* fileName = "my_db.txlog";
#else
#if defined(BINARY_DB)
scv_tr_binary_init();
const char *fileName = "my_db";
#elif defined(CTXT_DB)
scv_tr_compressed_init();
const char* fileName = "my_db.txlog";
#elif defined(SQLITE_DB)
scv_tr_sqlite_init();
const char* fileName = "my_db.txdb";
#else
scv_tr_text_init();
const char* fileName = "my_db.txlog";
#endif
scv_tr_db db(fileName);
scv_tr_db::set_default_db(&db);
@@ -378,7 +391,9 @@ int sc_main(int argc, char *argv[]) {
// Disable check for bus simulation.
sc_report_handler::set_actions(SC_ID_MORE_THAN_ONE_SIGNAL_DRIVER_, SC_DO_NOTHING);
// run the simulation
sc_start(1.0, SC_MS);
sc_start(10.0, SC_US);
sc_close_vcd_trace_file(tf);
auto int_us = std::chrono::duration_cast<std::chrono::microseconds>(std::chrono::system_clock::now()-start);
SCINFO() << "simulation duration "<<int_us.count()<<"µs";
return 0;
}