extended example to demonstrate use of indexed registers

.cproject

@@ -5,7 +5,7 @@
 			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cdt.managedbuild.config.gnu.macosx.exe.debug.133691581" moduleId="org.eclipse.cdt.core.settings" name="Debug">
 				<externalSettings/>
 				<extensions>
-					<extension id="org.eclipse.cdt.core.MachO64" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
 					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
 					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
@@ -17,7 +17,7 @@
 				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" cleanCommand="rm -rf" description="" id="cdt.managedbuild.config.gnu.macosx.exe.debug.133691581" name="Debug" parent="cdt.managedbuild.config.gnu.macosx.exe.debug">
 					<folderInfo id="cdt.managedbuild.config.gnu.macosx.exe.debug.133691581." name="/" resourcePath="">
 						<toolChain id="cdt.managedbuild.toolchain.gnu.macosx.exe.debug.500082514" name="MacOSX GCC" superClass="cdt.managedbuild.toolchain.gnu.macosx.exe.debug">
-							<targetPlatform id="cdt.managedbuild.target.gnu.platform.macosx.exe.debug.493103663" name="Debug Platform" superClass="cdt.managedbuild.target.gnu.platform.macosx.exe.debug"/>
+							<targetPlatform binaryParser="org.eclipse.cdt.core.ELF" id="cdt.managedbuild.target.gnu.platform.macosx.exe.debug.493103663" name="Debug Platform" superClass="cdt.managedbuild.target.gnu.platform.macosx.exe.debug"/>
 							<builder buildPath="${workspace_loc:/sc-components-test/build}" id="cdt.managedbuild.target.gnu.builder.base.214255941" keepEnvironmentInBuildfile="true" managedBuildOn="false" name="Gnu Make Builder" superClass="cdt.managedbuild.target.gnu.builder.base"/>
 							<tool id="cdt.managedbuild.tool.macosx.c.linker.macosx.exe.debug.1022976995" name="MacOS X C Linker" superClass="cdt.managedbuild.tool.macosx.c.linker.macosx.exe.debug"/>
 							<tool command="c++" id="cdt.managedbuild.tool.macosx.cpp.linker.macosx.exe.debug.1153644061" name="MacOS X C++ Linker" superClass="cdt.managedbuild.tool.macosx.cpp.linker.macosx.exe.debug">
@@ -74,7 +74,7 @@
 			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="cdt.managedbuild.config.macosx.exe.release.222902119" moduleId="org.eclipse.cdt.core.settings" name="Release">
 				<externalSettings/>
 				<extensions>
-					<extension id="org.eclipse.cdt.core.MachO64" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
 					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
 					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
 					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
@@ -86,7 +86,7 @@
 				<configuration artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.release" cleanCommand="rm -rf" description="" id="cdt.managedbuild.config.macosx.exe.release.222902119" name="Release" parent="cdt.managedbuild.config.macosx.exe.release">
 					<folderInfo id="cdt.managedbuild.config.macosx.exe.release.222902119." name="/" resourcePath="">
 						<toolChain id="cdt.managedbuild.toolchain.gnu.macosx.exe.release.370067321" name="MacOSX GCC" superClass="cdt.managedbuild.toolchain.gnu.macosx.exe.release">
-							<targetPlatform id="cdt.managedbuild.target.gnu.platform.macosx.exe.release.1613432662" name="Debug Platform" superClass="cdt.managedbuild.target.gnu.platform.macosx.exe.release"/>
+							<targetPlatform binaryParser="org.eclipse.cdt.core.ELF" id="cdt.managedbuild.target.gnu.platform.macosx.exe.release.1613432662" name="Debug Platform" superClass="cdt.managedbuild.target.gnu.platform.macosx.exe.release"/>
 							<builder buildPath="${workspace_loc:/scv_tr_sqlite}/Release" id="cdt.managedbuild.target.gnu.builder.macosx.exe.release.1921784777" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" superClass="cdt.managedbuild.target.gnu.builder.macosx.exe.release"/>
 							<tool id="cdt.managedbuild.tool.macosx.c.linker.macosx.exe.release.835264205" name="MacOS X C Linker" superClass="cdt.managedbuild.tool.macosx.c.linker.macosx.exe.release"/>
 							<tool id="cdt.managedbuild.tool.macosx.cpp.linker.macosx.exe.release.807087528" name="MacOS X C++ Linker" superClass="cdt.managedbuild.tool.macosx.cpp.linker.macosx.exe.release">

examples/simple_system/CMakeLists.txt

@@ -18,6 +18,7 @@ cmake_minimum_required (VERSION 2.8.12)
 # Add executable called "simple_system" that is built from the source files
 # "scv_tr_recording_example.cpp". The extensions are automatically found.
 add_executable (simple_system 
+    plic.cpp
     uart.cpp
     spi.cpp
     gpio.cpp

examples/simple_system/gen/e300_plat_t.h

@@ -1,10 +1,11 @@
 #ifndef _E300_PLAT_MAP_H_
 #define _E300_PLAT_MAP_H_
 // need double braces, see https://stackoverflow.com/questions/6893700/how-to-construct-stdarray-object-with-initializer-list#6894191
-const std::array<sysc::target_memory_map_entry<32>, 3> e300_plat_map = {{
+const std::array<sysc::target_memory_map_entry<32>, 4> e300_plat_map = {{
-        {&i_gpio, 0x10012000, 0x1000},
+    {&i_plic, 0xc000000, 0x1000},
-        {&i_uart, 0x10013000, 0x1000},
+    {&i_gpio, 0x10012000, 0x1000},
-        {&i_spi,  0x10014000, 0x1000}
+    {&i_uart, 0x10013000, 0x1000},
+    {&i_spi, 0x10014000, 0x1000},
 }};
 
 #endif /* _E300_PLAT_MAP_H_ */

examples/simple_system/gen/gpio_regs.h

@@ -28,7 +28,7 @@
 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 // POSSIBILITY OF SUCH DAMAGE.
 //
-// Created on: Tue Sep 19 18:02:10 CEST 2017
+// Created on: Wed Sep 20 11:47:24 CEST 2017
 //             *      gpio_regs.h Author: <RDL Generator>
 //
 ////////////////////////////////////////////////////////////////////////////////
@@ -137,23 +137,23 @@ inline sysc::gpio_regs::gpio_regs(sc_core::sc_module_name nm)
 
 template<unsigned BUSWIDTH>
 inline void sysc::gpio_regs::registerResources(sysc::tlm_target<BUSWIDTH>& target) {
-    target.addResource(value, 0x0UL, 0x4UL);
+    target.addResource(value, 0x0UL);
-    target.addResource(input_en, 0x4UL, 0x4UL);
+    target.addResource(input_en, 0x4UL);
-    target.addResource(output_en, 0x8UL, 0x4UL);
+    target.addResource(output_en, 0x8UL);
-    target.addResource(port, 0xcUL, 0x4UL);
+    target.addResource(port, 0xcUL);
-    target.addResource(pue, 0x10UL, 0x4UL);
+    target.addResource(pue, 0x10UL);
-    target.addResource(ds, 0x14UL, 0x4UL);
+    target.addResource(ds, 0x14UL);
-    target.addResource(rise_ie, 0x18UL, 0x4UL);
+    target.addResource(rise_ie, 0x18UL);
-    target.addResource(rise_ip, 0x1cUL, 0x4UL);
+    target.addResource(rise_ip, 0x1cUL);
-    target.addResource(fall_ie, 0x20UL, 0x4UL);
+    target.addResource(fall_ie, 0x20UL);
-    target.addResource(fall_ip, 0x24UL, 0x4UL);
+    target.addResource(fall_ip, 0x24UL);
-    target.addResource(high_ie, 0x28UL, 0x4UL);
+    target.addResource(high_ie, 0x28UL);
-    target.addResource(high_ip, 0x2cUL, 0x4UL);
+    target.addResource(high_ip, 0x2cUL);
-    target.addResource(low_ie, 0x30UL, 0x4UL);
+    target.addResource(low_ie, 0x30UL);
-    target.addResource(low_ip, 0x34UL, 0x4UL);
+    target.addResource(low_ip, 0x34UL);
-    target.addResource(iof_en, 0x38UL, 0x4UL);
+    target.addResource(iof_en, 0x38UL);
-    target.addResource(iof_sel, 0x3cUL, 0x4UL);
+    target.addResource(iof_sel, 0x3cUL);
-    target.addResource(out_xor, 0x40UL, 0x4UL);
+    target.addResource(out_xor, 0x40UL);
 }
 
 #endif // _GPIO_REGS_H_

examples/simple_system/gen/plic_regs.h

@@ -0,0 +1,104 @@
+////////////////////////////////////////////////////////////////////////////////
+// Copyright (C) 2017, MINRES Technologies GmbH
+// All rights reserved.
+//
+// Redistribution and use in source and binary forms, with or without
+// modification, are permitted provided that the following conditions are met:
+//
+// 1. Redistributions of source code must retain the above copyright notice,
+//    this list of conditions and the following disclaimer.
+//
+// 2. Redistributions in binary form must reproduce the above copyright notice,
+//    this list of conditions and the following disclaimer in the documentation
+//    and/or other materials provided with the distribution.
+//
+// 3. Neither the name of the copyright holder nor the names of its contributors
+//    may be used to endorse or promote products derived from this software
+//    without specific prior written permission.
+//
+// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+// AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+// IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+// ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+// LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+// CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+// SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+// INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+// CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+// ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+// POSSIBILITY OF SUCH DAMAGE.
+//
+// Created on: Wed Sep 20 11:47:24 CEST 2017
+//             *      plic_regs.h Author: <RDL Generator>
+//
+////////////////////////////////////////////////////////////////////////////////
+
+#ifndef _PLIC_REGS_H_
+#define _PLIC_REGS_H_
+
+#include <sysc/utilities.h>
+#include <util/bit_field.h>
+#include <sysc/register.h>
+#include <sysc/tlm_target.h>
+
+namespace sysc {
+
+class plic_regs :
+        public sc_core::sc_module,
+        public sysc::resetable
+{
+protected:
+    // storage declarations
+    BEGIN_BF_DECL(priority_t, uint32_t);
+        BF_FIELD(priority, 0, 3);
+    END_BF_DECL();
+    std::array<priority_t, 255> r_priority;
+    
+    uint32_t r_pending;
+    
+    uint32_t r_enabled;
+    
+    BEGIN_BF_DECL(threshold_t, uint32_t);
+        BF_FIELD(threshold, 0, 3);
+    END_BF_DECL() r_threshold;
+    
+    uint32_t r_claim_complete;
+    
+    // register declarations
+    sysc::sc_register_field<priority_t, 255> priority;
+    sysc::sc_register<uint32_t> pending;
+    sysc::sc_register<uint32_t> enabled;
+    sysc::sc_register<threshold_t> threshold;
+    sysc::sc_register<uint32_t> claim_complete;
+    
+public:
+    plic_regs(sc_core::sc_module_name nm);
+
+    template<unsigned BUSWIDTH=32>
+    void registerResources(sysc::tlm_target<BUSWIDTH>& target);
+};
+}
+//////////////////////////////////////////////////////////////////////////////
+// member functions
+//////////////////////////////////////////////////////////////////////////////
+
+inline sysc::plic_regs::plic_regs(sc_core::sc_module_name nm)
+: sc_core::sc_module(nm)
+, NAMED(priority, r_priority, 0, *this)
+, NAMED(pending, r_pending, 0, *this)
+, NAMED(enabled, r_enabled, 0, *this)
+, NAMED(threshold, r_threshold, 0, *this)
+, NAMED(claim_complete, r_claim_complete, 0, *this)
+{
+}
+
+template<unsigned BUSWIDTH>
+inline void sysc::plic_regs::registerResources(sysc::tlm_target<BUSWIDTH>& target) {
+    target.addResource(priority, 0x4UL);
+    target.addResource(pending, 0x1000UL);
+    target.addResource(enabled, 0x2000UL);
+    target.addResource(threshold, 0xc200000UL);
+    target.addResource(claim_complete, 0xc200004UL);
+}
+
+#endif // _PLIC_REGS_H_

examples/simple_system/gen/spi_regs.h

@@ -28,7 +28,7 @@
 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 // POSSIBILITY OF SUCH DAMAGE.
 //
-// Created on: Tue Sep 19 18:02:09 CEST 2017
+// Created on: Wed Sep 20 11:47:24 CEST 2017
 //             *      spi_regs.h Author: <RDL Generator>
 //
 ////////////////////////////////////////////////////////////////////////////////
@@ -127,22 +127,22 @@ protected:
     END_BF_DECL() r_ip;
     
     // register declarations
-    sysc::sc_register<typename sckdiv_t::StorageType> sckdiv;
+    sysc::sc_register<sckdiv_t> sckdiv;
-    sysc::sc_register<typename sckmode_t::StorageType> sckmode;
+    sysc::sc_register<sckmode_t> sckmode;
     sysc::sc_register<uint32_t> csid;
     sysc::sc_register<uint32_t> csdef;
-    sysc::sc_register<typename csmode_t::StorageType> csmode;
+    sysc::sc_register<csmode_t> csmode;
-    sysc::sc_register<typename delay0_t::StorageType> delay0;
+    sysc::sc_register<delay0_t> delay0;
-    sysc::sc_register<typename delay1_t::StorageType> delay1;
+    sysc::sc_register<delay1_t> delay1;
-    sysc::sc_register<typename fmt_t::StorageType> fmt;
+    sysc::sc_register<fmt_t> fmt;
-    sysc::sc_register<typename txdata_t::StorageType> txdata;
+    sysc::sc_register<txdata_t> txdata;
-    sysc::sc_register<typename rxdata_t::StorageType> rxdata;
+    sysc::sc_register<rxdata_t> rxdata;
-    sysc::sc_register<typename txmark_t::StorageType> txmark;
+    sysc::sc_register<txmark_t> txmark;
-    sysc::sc_register<typename rxmark_t::StorageType> rxmark;
+    sysc::sc_register<rxmark_t> rxmark;
-    sysc::sc_register<typename fctrl_t::StorageType> fctrl;
+    sysc::sc_register<fctrl_t> fctrl;
-    sysc::sc_register<typename ffmt_t::StorageType> ffmt;
+    sysc::sc_register<ffmt_t> ffmt;
-    sysc::sc_register<typename ie_t::StorageType> ie;
+    sysc::sc_register<ie_t> ie;
-    sysc::sc_register<typename ip_t::StorageType> ip;
+    sysc::sc_register<ip_t> ip;
     
 public:
     spi_regs(sc_core::sc_module_name nm);
@@ -178,22 +178,22 @@ inline sysc::spi_regs::spi_regs(sc_core::sc_module_name nm)
 
 template<unsigned BUSWIDTH>
 inline void sysc::spi_regs::registerResources(sysc::tlm_target<BUSWIDTH>& target) {
-    target.addResource(sckdiv, 0x0UL, 0x4UL);
+    target.addResource(sckdiv, 0x0UL);
-    target.addResource(sckmode, 0x4UL, 0x4UL);
+    target.addResource(sckmode, 0x4UL);
-    target.addResource(csid, 0x10UL, 0x4UL);
+    target.addResource(csid, 0x10UL);
-    target.addResource(csdef, 0x14UL, 0x4UL);
+    target.addResource(csdef, 0x14UL);
-    target.addResource(csmode, 0x18UL, 0x4UL);
+    target.addResource(csmode, 0x18UL);
-    target.addResource(delay0, 0x28UL, 0x4UL);
+    target.addResource(delay0, 0x28UL);
-    target.addResource(delay1, 0x2cUL, 0x4UL);
+    target.addResource(delay1, 0x2cUL);
-    target.addResource(fmt, 0x40UL, 0x4UL);
+    target.addResource(fmt, 0x40UL);
-    target.addResource(txdata, 0x48UL, 0x4UL);
+    target.addResource(txdata, 0x48UL);
-    target.addResource(rxdata, 0x4cUL, 0x4UL);
+    target.addResource(rxdata, 0x4cUL);
-    target.addResource(txmark, 0x50UL, 0x4UL);
+    target.addResource(txmark, 0x50UL);
-    target.addResource(rxmark, 0x54UL, 0x4UL);
+    target.addResource(rxmark, 0x54UL);
-    target.addResource(fctrl, 0x60UL, 0x4UL);
+    target.addResource(fctrl, 0x60UL);
-    target.addResource(ffmt, 0x64UL, 0x4UL);
+    target.addResource(ffmt, 0x64UL);
-    target.addResource(ie, 0x70UL, 0x4UL);
+    target.addResource(ie, 0x70UL);
-    target.addResource(ip, 0x74UL, 0x4UL);
+    target.addResource(ip, 0x74UL);
 }
 
 #endif // _SPI_REGS_H_

examples/simple_system/gen/uart_regs.h

@@ -28,7 +28,7 @@
 // ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
 // POSSIBILITY OF SUCH DAMAGE.
 //
-// Created on: Tue Sep 19 18:02:09 CEST 2017
+// Created on: Wed Sep 20 11:47:24 CEST 2017
 //             *      uart_regs.h Author: <RDL Generator>
 //
 ////////////////////////////////////////////////////////////////////////////////
@@ -87,13 +87,13 @@ protected:
     END_BF_DECL() r_div;
     
     // register declarations
-    sysc::sc_register<typename txdata_t::StorageType> txdata;
+    sysc::sc_register<txdata_t> txdata;
-    sysc::sc_register<typename rxdata_t::StorageType> rxdata;
+    sysc::sc_register<rxdata_t> rxdata;
-    sysc::sc_register<typename txctrl_t::StorageType> txctrl;
+    sysc::sc_register<txctrl_t> txctrl;
-    sysc::sc_register<typename rxctrl_t::StorageType> rxctrl;
+    sysc::sc_register<rxctrl_t> rxctrl;
-    sysc::sc_register<typename ie_t::StorageType> ie;
+    sysc::sc_register<ie_t>     ie;
-    sysc::sc_register<typename ip_t::StorageType> ip;
+    sysc::sc_register<ip_t>     ip;
-    sysc::sc_register<typename div_t::StorageType> div;
+    sysc::sc_register<div_t>    div;
     
 public:
     uart_regs(sc_core::sc_module_name nm);
@@ -120,13 +120,13 @@ inline sysc::uart_regs::uart_regs(sc_core::sc_module_name nm)
 
 template<unsigned BUSWIDTH>
 inline void sysc::uart_regs::registerResources(sysc::tlm_target<BUSWIDTH>& target) {
-    target.addResource(txdata, 0x0UL, 0x4UL);
+    target.addResource(txdata, 0x0UL);
-    target.addResource(rxdata, 0x4UL, 0x4UL);
+    target.addResource(rxdata, 0x4UL);
-    target.addResource(txctrl, 0x8UL, 0x4UL);
+    target.addResource(txctrl, 0x8UL);
-    target.addResource(rxctrl, 0xcUL, 0x4UL);
+    target.addResource(rxctrl, 0xcUL);
-    target.addResource(ie, 0x10UL, 0x4UL);
+    target.addResource(ie, 0x10UL);
-    target.addResource(ip, 0x14UL, 0x4UL);
+    target.addResource(ip, 0x14UL);
-    target.addResource(div, 0x18UL, 0x4UL);
+    target.addResource(div, 0x18UL);
 }
 
 #endif // _UART_REGS_H_

examples/simple_system/plic.cpp

@@ -0,0 +1,51 @@
+////////////////////////////////////////////////////////////////////////////////
+// Copyright 2017 eyck@minres.com
+// 
+// Licensed under the Apache License, Version 2.0 (the "License"); you may not
+// use this file except in compliance with the License.  You may obtain a copy
+// of the License at
+// 
+//   http://www.apache.org/licenses/LICENSE-2.0
+// 
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+// WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+// License for the specific language governing permissions and limitations under
+// the License.
+////////////////////////////////////////////////////////////////////////////////
+
+#include "plic.h"
+#include "gen/plic_regs.h"
+#include "sysc/utilities.h"
+
+namespace sysc {
+
+plic::plic(sc_core::sc_module_name nm)
+: sc_core::sc_module(nm)
+, tlm_target<>(clk)
+, NAMED(clk_i)
+, NAMED(rst_i)
+, NAMEDD(plic_regs, regs)
+{
+    regs->registerResources(*this);
+    SC_METHOD(clock_cb);
+    sensitive<<clk_i;
+    SC_METHOD(reset_cb);
+    sensitive<<rst_i;
+}
+
+plic::~plic() {
+}
+
+void plic::clock_cb() {
+    this->clk=clk_i.read();
+}
+
+void plic::reset_cb() {
+    if(rst_i.read())
+        regs->reset_start();
+    else
+        regs->reset_stop();
+}
+
+} /* namespace sysc */

examples/simple_system/plic.h

@@ -0,0 +1,42 @@
+/*******************************************************************************
+ * Copyright 2017 eyck@minres.com
+ * 
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may not
+ * use this file except in compliance with the License.  You may obtain a copy
+ * of the License at
+ * 
+ *   http://www.apache.org/licenses/LICENSE-2.0
+ * 
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.  See the
+ * License for the specific language governing permissions and limitations under
+ * the License.
+ ******************************************************************************/
+
+#ifndef _PLIC_H_
+#define _PLIC_H_
+
+#include <sysc/tlm_target.h>
+
+namespace sysc {
+
+class plic_regs;
+
+class plic: public sc_core::sc_module, public tlm_target<> {
+public:
+    SC_HAS_PROCESS(plic);
+    sc_core::sc_in<sc_core::sc_time> clk_i;
+    sc_core::sc_in<bool>             rst_i;
+    plic(sc_core::sc_module_name nm);
+    virtual ~plic();
+protected:
+    void clock_cb();
+    void reset_cb();
+    sc_core::sc_time clk;
+    std::unique_ptr<plic_regs> regs;
+};
+
+} /* namespace sysc */
+
+#endif /* _PLIC_H_ */

examples/simple_system/simple_system.cpp

@@ -27,28 +27,31 @@ namespace sysc {
 simple_system::simple_system(sc_core::sc_module_name nm)
 : sc_core::sc_module(nm)
 , NAMED(i_master)
-, NAMED(i_router, 3, 1)
+, NAMED(i_router, 4, 1)
 , NAMED(i_uart)
 , NAMED(i_spi)
 , NAMED(i_gpio)
+, NAMED(i_plic)
 , NAMED(s_clk)
 , NAMED(s_rst)
 {
     i_master.intor(i_router.target[0]);
     size_t i=0;
     for(const auto& e: e300_plat_map){
-        i_router.initiator[i](e.target->socket);
+        i_router.initiator.at(i)(e.target->socket);
         i_router.add_target_range(i, e.start, e.size);
         i++;
     }
     i_uart.clk_i(s_clk);
     i_spi.clk_i(s_clk);
     i_gpio.clk_i(s_clk);
+    i_plic.clk_i(s_clk);
     s_clk.write(10_ns);
 
     i_uart.rst_i(s_rst);
     i_spi.rst_i(s_rst);
     i_gpio.rst_i(s_rst);
+    i_plic.rst_i(s_rst);
     i_master.rst_i(s_rst);
 
     SC_THREAD(gen_reset);

examples/simple_system/simple_system.h

@@ -26,6 +26,7 @@
 #include "uart.h"
 #include "spi.h"
 #include "gpio.h"
+#include "plic.h"
 
 #include "test_initiator.h"
 #include <sysc/router.h>
@@ -44,6 +45,7 @@ public:
     uart i_uart;
     spi i_spi;
     gpio i_gpio;
+    plic i_plic;
     sc_core::sc_signal<sc_core::sc_time> s_clk;
     sc_core::sc_signal<bool> s_rst;
 

examples/simple_system/test_initiator.cpp

@@ -44,7 +44,8 @@ void test_initiator::run() {
     std::array<uint8_t, 4> data;
     srInfo()("group", "comm")("read access");
     gp.set_command(tlm::TLM_READ_COMMAND);
-    gp.set_address(0x10012000);
+//    gp.set_address(0x10012000);
+    gp.set_address(0xc000004);
     gp.set_data_ptr(data.data());
     gp.set_data_length(data.size());
     gp.set_streaming_width(4);

sc-components

@@ -1 +1 @@
-Subproject commit 48428f097659421db15d1eeac3a74fdd653db6e5
+Subproject commit 0ae9ca921a3c59f7f5e0cad119314e65bd50c327

simple_system.txlog

@@ -29,7 +29,7 @@ end_attribute (ID 1, name "end_delay", type "UNSIGNED")
 tx_begin 2 6 20 ns
 a 0
 tx_relation "PRED/SUCC" 2 1
-scv_tr_stream (ID 9, name "i_simple_system.i_gpio.socket.blocking", kind "TRANSACTOR")
+scv_tr_stream (ID 9, name "i_simple_system.i_plic.socket.blocking", kind "TRANSACTOR")
 scv_tr_generator (ID 10, name "read", scv_tr_stream 9,
 begin_attribute (ID 0, name "start_delay", type "UNSIGNED")
 end_attribute (ID 1, name "end_delay", type "UNSIGNED")
@@ -45,7 +45,7 @@ end_attribute (ID 1, name "end_delay", type "UNSIGNED")
 tx_begin 3 10 20 ns
 a 0
 tx_relation "PRED/SUCC" 3 2
-tx_record_attribute 3 "trans.address" UNSIGNED = 0
+tx_record_attribute 3 "trans.address" UNSIGNED = 4
 tx_record_attribute 3 "trans.command" ENUMERATION = "tlm::TLM_READ_COMMAND"
 tx_record_attribute 3 "trans.data" POINTER = 0
 tx_record_attribute 3 "trans.data_length" UNSIGNED = 4
@@ -57,8 +57,8 @@ tx_record_attribute 3 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 3 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_record_attribute 3 "trans.data_value" UNSIGNED = 0
 tx_end 3 10 20 ns
-a 0
+a 10000
-tx_record_attribute 2 "trans.address" UNSIGNED = 0
+tx_record_attribute 2 "trans.address" UNSIGNED = 4
 tx_record_attribute 2 "trans.command" ENUMERATION = "tlm::TLM_READ_COMMAND"
 tx_record_attribute 2 "trans.data" POINTER = 0
 tx_record_attribute 2 "trans.data_length" UNSIGNED = 4
@@ -70,8 +70,8 @@ tx_record_attribute 2 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 2 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_record_attribute 2 "trans.data_value" UNSIGNED = 0
 tx_end 2 6 20 ns
-a 0
+a 10000
-tx_record_attribute 1 "trans.address" UNSIGNED = 268509184
+tx_record_attribute 1 "trans.address" UNSIGNED = 201326596
 tx_record_attribute 1 "trans.command" ENUMERATION = "tlm::TLM_READ_COMMAND"
 tx_record_attribute 1 "trans.data" POINTER = 0
 tx_record_attribute 1 "trans.data_length" UNSIGNED = 4
@@ -83,8 +83,8 @@ tx_record_attribute 1 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 1 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_record_attribute 1 "trans.data_value" UNSIGNED = 0
 tx_end 1 2 20 ns
-a 0
+a 10000
-scv_tr_stream (ID 13, name "i_simple_system.i_gpio.socket.bl_t_ann", kind "TRANSACTOR")
+scv_tr_stream (ID 13, name "i_simple_system.i_plic.socket.bl_t_ann", kind "TRANSACTOR")
 scv_tr_generator (ID 14, name "read", scv_tr_stream 13,
 begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
 end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
@@ -99,7 +99,7 @@ end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
 )
 tx_begin 4 14 20 ns
 a "tlm::TLM_READ_COMMAND"
-tx_record_attribute 4 "trans.address" UNSIGNED = 0
+tx_record_attribute 4 "trans.address" UNSIGNED = 4
 tx_record_attribute 4 "trans.command" ENUMERATION = "tlm::TLM_READ_COMMAND"
 tx_record_attribute 4 "trans.data" POINTER = 0
 tx_record_attribute 4 "trans.data_length" UNSIGNED = 4
@@ -110,8 +110,6 @@ tx_record_attribute 4 "trans.byte_enable_length" UNSIGNED = 0
 tx_record_attribute 4 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 4 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_relation "PARENT/CHILD" 4 3
-tx_end 4 14 20 ns
-a "tlm::TLM_INCOMPLETE_RESPONSE"
 scv_tr_stream (ID 17, name "i_simple_system.i_router.intor_0.bl_t_ann", kind "TRANSACTOR")
 scv_tr_generator (ID 18, name "read", scv_tr_stream 17,
 begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
@@ -127,7 +125,7 @@ end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
 )
 tx_begin 5 18 20 ns
 a "tlm::TLM_READ_COMMAND"
-tx_record_attribute 5 "trans.address" UNSIGNED = 0
+tx_record_attribute 5 "trans.address" UNSIGNED = 4
 tx_record_attribute 5 "trans.command" ENUMERATION = "tlm::TLM_READ_COMMAND"
 tx_record_attribute 5 "trans.data" POINTER = 0
 tx_record_attribute 5 "trans.data_length" UNSIGNED = 4
@@ -138,8 +136,6 @@ tx_record_attribute 5 "trans.byte_enable_length" UNSIGNED = 0
 tx_record_attribute 5 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 5 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_relation "PARENT/CHILD" 5 2
-tx_end 5 18 20 ns
-a "tlm::TLM_INCOMPLETE_RESPONSE"
 scv_tr_stream (ID 21, name "i_simple_system.i_router.target_0.bl_t_ann", kind "TRANSACTOR")
 scv_tr_generator (ID 22, name "read", scv_tr_stream 21,
 begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
@@ -155,7 +151,7 @@ end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
 )
 tx_begin 6 22 20 ns
 a "tlm::TLM_READ_COMMAND"
-tx_record_attribute 6 "trans.address" UNSIGNED = 268509184
+tx_record_attribute 6 "trans.address" UNSIGNED = 201326596
 tx_record_attribute 6 "trans.command" ENUMERATION = "tlm::TLM_READ_COMMAND"
 tx_record_attribute 6 "trans.data" POINTER = 0
 tx_record_attribute 6 "trans.data_length" UNSIGNED = 4
@@ -166,15 +162,45 @@ tx_record_attribute 6 "trans.byte_enable_length" UNSIGNED = 0
 tx_record_attribute 6 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 6 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_relation "PARENT/CHILD" 6 1
-tx_end 6 22 20 ns
+tx_end 6 22 30 ns
+a "tlm::TLM_INCOMPLETE_RESPONSE"
+tx_end 5 18 30 ns
+a "tlm::TLM_INCOMPLETE_RESPONSE"
+tx_end 4 14 30 ns
 a "tlm::TLM_INCOMPLETE_RESPONSE"
 tx_begin 7 3 30 ns
-a 0
+a 10000
-tx_begin 8 7 30 ns
+scv_tr_stream (ID 25, name "i_simple_system.i_router.intor_1.blocking", kind "TRANSACTOR")
-a 0
+scv_tr_generator (ID 26, name "read", scv_tr_stream 25,
+begin_attribute (ID 0, name "start_delay", type "UNSIGNED")
+end_attribute (ID 1, name "end_delay", type "UNSIGNED")
+)
+scv_tr_generator (ID 27, name "write", scv_tr_stream 25,
+begin_attribute (ID 0, name "start_delay", type "UNSIGNED")
+end_attribute (ID 1, name "end_delay", type "UNSIGNED")
+)
+scv_tr_generator (ID 28, name "ignore", scv_tr_stream 25,
+begin_attribute (ID 0, name "start_delay", type "UNSIGNED")
+end_attribute (ID 1, name "end_delay", type "UNSIGNED")
+)
+tx_begin 8 27 30 ns
+a 10000
 tx_relation "PRED/SUCC" 8 7
-tx_begin 9 11 30 ns
+scv_tr_stream (ID 29, name "i_simple_system.i_gpio.socket.blocking", kind "TRANSACTOR")
-a 0
+scv_tr_generator (ID 30, name "read", scv_tr_stream 29,
+begin_attribute (ID 0, name "start_delay", type "UNSIGNED")
+end_attribute (ID 1, name "end_delay", type "UNSIGNED")
+)
+scv_tr_generator (ID 31, name "write", scv_tr_stream 29,
+begin_attribute (ID 0, name "start_delay", type "UNSIGNED")
+end_attribute (ID 1, name "end_delay", type "UNSIGNED")
+)
+scv_tr_generator (ID 32, name "ignore", scv_tr_stream 29,
+begin_attribute (ID 0, name "start_delay", type "UNSIGNED")
+end_attribute (ID 1, name "end_delay", type "UNSIGNED")
+)
+tx_begin 9 31 30 ns
+a 10000
 tx_relation "PRED/SUCC" 9 8
 tx_record_attribute 9 "trans.address" UNSIGNED = 0
 tx_record_attribute 9 "trans.command" ENUMERATION = "tlm::TLM_WRITE_COMMAND"
@@ -187,8 +213,8 @@ tx_record_attribute 9 "trans.byte_enable_length" UNSIGNED = 0
 tx_record_attribute 9 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 9 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_record_attribute 9 "trans.data_value" UNSIGNED = 165
-tx_end 9 11 30 ns
+tx_end 9 31 30 ns
-a 0
+a 10000
 tx_record_attribute 8 "trans.address" UNSIGNED = 0
 tx_record_attribute 8 "trans.command" ENUMERATION = "tlm::TLM_WRITE_COMMAND"
 tx_record_attribute 8 "trans.data" POINTER = 0
@@ -200,8 +226,8 @@ tx_record_attribute 8 "trans.byte_enable_length" UNSIGNED = 0
 tx_record_attribute 8 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 8 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_record_attribute 8 "trans.data_value" UNSIGNED = 165
-tx_end 8 7 30 ns
+tx_end 8 27 30 ns
-a 0
+a 10000
 tx_record_attribute 7 "trans.address" UNSIGNED = 268509184
 tx_record_attribute 7 "trans.command" ENUMERATION = "tlm::TLM_WRITE_COMMAND"
 tx_record_attribute 7 "trans.data" POINTER = 0
@@ -214,10 +240,10 @@ tx_record_attribute 7 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 7 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
 tx_record_attribute 7 "trans.data_value" UNSIGNED = 165
 tx_end 7 3 30 ns
-a 0
+a 10000
-tx_begin 10 15 30 ns
+tx_begin 10 23 40 ns
 a "tlm::TLM_WRITE_COMMAND"
-tx_record_attribute 10 "trans.address" UNSIGNED = 0
+tx_record_attribute 10 "trans.address" UNSIGNED = 268509184
 tx_record_attribute 10 "trans.command" ENUMERATION = "tlm::TLM_WRITE_COMMAND"
 tx_record_attribute 10 "trans.data" POINTER = 0
 tx_record_attribute 10 "trans.data_length" UNSIGNED = 4
@@ -227,10 +253,23 @@ tx_record_attribute 10 "trans.byte_enable" POINTER = 0
 tx_record_attribute 10 "trans.byte_enable_length" UNSIGNED = 0
 tx_record_attribute 10 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 10 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
-tx_relation "PARENT/CHILD" 10 9
+tx_relation "PARENT/CHILD" 10 7
-tx_end 10 15 30 ns
+tx_end 10 23 40 ns
 a "tlm::TLM_OK_RESPONSE"
-tx_begin 11 19 30 ns
+scv_tr_stream (ID 33, name "i_simple_system.i_gpio.socket.bl_t_ann", kind "TRANSACTOR")
+scv_tr_generator (ID 34, name "read", scv_tr_stream 33,
+begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
+end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
+)
+scv_tr_generator (ID 35, name "write", scv_tr_stream 33,
+begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
+end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
+)
+scv_tr_generator (ID 36, name "ignore", scv_tr_stream 33,
+begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
+end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
+)
+tx_begin 11 35 40 ns
 a "tlm::TLM_WRITE_COMMAND"
 tx_record_attribute 11 "trans.address" UNSIGNED = 0
 tx_record_attribute 11 "trans.command" ENUMERATION = "tlm::TLM_WRITE_COMMAND"
@@ -242,12 +281,25 @@ tx_record_attribute 11 "trans.byte_enable" POINTER = 0
 tx_record_attribute 11 "trans.byte_enable_length" UNSIGNED = 0
 tx_record_attribute 11 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 11 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
-tx_relation "PARENT/CHILD" 11 8
+tx_relation "PARENT/CHILD" 11 9
-tx_end 11 19 30 ns
+tx_end 11 35 40 ns
 a "tlm::TLM_OK_RESPONSE"
-tx_begin 12 23 30 ns
+scv_tr_stream (ID 37, name "i_simple_system.i_router.intor_1.bl_t_ann", kind "TRANSACTOR")
+scv_tr_generator (ID 38, name "read", scv_tr_stream 37,
+begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
+end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
+)
+scv_tr_generator (ID 39, name "write", scv_tr_stream 37,
+begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
+end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
+)
+scv_tr_generator (ID 40, name "ignore", scv_tr_stream 37,
+begin_attribute (ID 0, name "<anonymous>", type "ENUMERATION")
+end_attribute (ID 1, name "<anonymous>", type "ENUMERATION")
+)
+tx_begin 12 39 40 ns
 a "tlm::TLM_WRITE_COMMAND"
-tx_record_attribute 12 "trans.address" UNSIGNED = 268509184
+tx_record_attribute 12 "trans.address" UNSIGNED = 0
 tx_record_attribute 12 "trans.command" ENUMERATION = "tlm::TLM_WRITE_COMMAND"
 tx_record_attribute 12 "trans.data" POINTER = 0
 tx_record_attribute 12 "trans.data_length" UNSIGNED = 4
@@ -257,6 +309,6 @@ tx_record_attribute 12 "trans.byte_enable" POINTER = 0
 tx_record_attribute 12 "trans.byte_enable_length" UNSIGNED = 0
 tx_record_attribute 12 "trans.streaming_width" UNSIGNED = 4
 tx_record_attribute 12 "trans.gp_option" ENUMERATION = "tlm::TLM_MIN_PAYLOAD"
-tx_relation "PARENT/CHILD" 12 7
+tx_relation "PARENT/CHILD" 12 8
-tx_end 12 23 30 ns
+tx_end 12 39 40 ns
 a "tlm::TLM_OK_RESPONSE"