SystemC-Components-Test/tests/axi4_pin_level/narrow_burst_test.cpp

#define SC_INCLUDE_DYNAMIC_PROCESSES
#include "../axi4_pin_level/testbench.h"
#include <factory.h>

#include <catch2/catch_all.hpp>

using namespace sc_core;

template<typename bus_cfg>
tlm::tlm_generic_payload* prepare_trans(uint64_t start_address, size_t len, unsigned id_offs = 0,
                                        unsigned addr_offs = 0) {
    static uint8_t  id{0};
    auto trans = tlm::scc::tlm_mm<>::get().allocate<axi::axi4_extension>(len);
    trans->set_address(start_address);
    tlm::scc::setId(*trans, id);
    auto ext = trans->get_extension<axi::axi4_extension>();
    trans->set_data_length(len);
    trans->set_streaming_width(len);
    ext->set_size(scc::ilog2(4));
    sc_assert(len < (bus_cfg::BUSWIDTH / 8) || len % (bus_cfg::BUSWIDTH / 8) == 0);
    auto length = (len * 8 - 1) / 32;
    if(start_address % (bus_cfg::BUSWIDTH / 8))
        length++;
    ext->set_length(length);
    // ext->set_burst(len * 8 > bus_cfg::buswidth ? axi::burst_e::INCR : axi::burst_e::FIXED);
    ext->set_burst(axi::burst_e::INCR);
    ext->set_id(id | id_offs);
    id = (id + 1) % 8;
    return trans;
}

inline void randomize(tlm::tlm_generic_payload& gp) {
    static uint8_t  req_cnt{0};
    auto addr = gp.get_address();
    uint8_t const* src = reinterpret_cast<uint8_t const*>(&addr);
    for(size_t i = 0; i < gp.get_data_length(); ++i) {
        *(gp.get_data_ptr() + i) = i % 2 ? i : req_cnt;
    }
    req_cnt++;
}

TEST_CASE("AXI", "[axi]") {
    struct {
        unsigned int ResetCycles{10};
        unsigned int BurstLengthByte{16};
        unsigned int NumberOfIterations{10};
        unsigned resp_cnt{0};
    } setup;

    auto& dut = factory::get<testbench>();
    dut.tgt_pe.set_operation_cb([&setup](axi::axi_protocol_types::tlm_payload_type& trans) -> unsigned {
        auto addr = trans.get_address();
        uint8_t const* src = reinterpret_cast<uint8_t const*>(&addr);
        for(size_t i = 0; i < trans.get_data_length(); ++i) {
            *(trans.get_data_ptr() + i) = i % 2 ? i : setup.resp_cnt;
        }
        setup.resp_cnt++;
        return 0;
    });

    dut.rst.write(false);
    sc_start(3*dut.clk.period());
    dut.rst.write(true);
    sc_start(3*dut.clk.period());

    auto run1 = sc_spawn([&dut, &setup](){
        unsigned int StartAddr{0x20};
        for(int i = 0; i < setup.NumberOfIterations; ++i) {
            SCCDEBUG("test") << "run0 executing transactions in iteration " << i;
            { // 1
                tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, setup.BurstLengthByte);
                randomize(*trans);
                trans->set_command(tlm::TLM_READ_COMMAND);
                dut.intor_pe.transport(*trans, false);
                if(trans->get_response_status() != tlm::TLM_OK_RESPONSE)
                    SCCERR() << "Invalid response status" << trans->get_response_string();
            }
            StartAddr += setup.BurstLengthByte;
            { // 2
                tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, setup.BurstLengthByte);
                trans->set_command(tlm::TLM_WRITE_COMMAND);
                randomize(*trans);
                dut.intor_pe.transport(*trans, false);
                if(trans->get_response_status() != tlm::TLM_OK_RESPONSE)
                    SCCERR() << "Invalid response status" << trans->get_response_string();
            }
            StartAddr += setup.BurstLengthByte;
        }
    });
    auto run2 = sc_spawn([&dut, &setup](){
        unsigned int StartAddr{0x1020};
        for(int i = 0; i < setup.NumberOfIterations; ++i) {
            SCCDEBUG("test") << "run1 executing transactions in iteration " << i;
            { // 1
                tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, setup.BurstLengthByte, 0x8);
                randomize(*trans);
                trans->set_command(tlm::TLM_READ_COMMAND);
                dut.intor_pe.transport(*trans, false);
                if(trans->get_response_status() != tlm::TLM_OK_RESPONSE)
                    SCCERR() << "Invalid response status" << trans->get_response_string();
            }
            StartAddr += setup.BurstLengthByte;
            { // 2
                tlm::scc::tlm_gp_shared_ptr trans = prepare_trans<testbench::bus_cfg>(StartAddr, setup.BurstLengthByte, 0x8);
                trans->set_command(tlm::TLM_WRITE_COMMAND);
                randomize(*trans);
                dut.intor_pe.transport(*trans, false);
                if(trans->get_response_status() != tlm::TLM_OK_RESPONSE)
                    SCCERR() << "Invalid response status" << trans->get_response_string();
            }
            StartAddr += setup.BurstLengthByte;
        }
    });
    sc_start(1000 * dut.clk.period());
    REQUIRE(run1.terminated());
    REQUIRE(run2.terminated());
    REQUIRE(setup.resp_cnt==40);
}