Added structural description

This commit is contained in:
Eyck Jentzsch 2019-01-03 21:15:57 +01:00
parent 3f7fbba0aa
commit a8738defea
5 changed files with 106 additions and 4 deletions

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@ -13,3 +13,6 @@ STDCXX=11 MAKE_NPROCS=32 pip install --verbose --force-reinstall --ignore-instal
pip install conan
```
## TODO
* pythonize `sc_module` with iteration protocol (`__next__` and `StopIteration` exception)

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@ -111,8 +111,7 @@ def _pythonizor(klass, name):
# install the pythonizor as a callback on namespace 'Math' (default is the global namespace)
cppyy.py.add_pythonization(_pythonizor, 'sc_core')
# reflection methods
def get_members(sc_object):
def is_cpp_data_type(name, module):

81
pysysc/structural.py Normal file
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@ -0,0 +1,81 @@
'''
Created on 02.01.2019
@author: eyck
'''
from cppyy import gbl as cpp
from builtins import getattr
import re
class Module(object):
'''
classdocs
'''
def __init__(self, clazz):
self.cppclazz=clazz
self.instance=None
def __getattr__(self, attr):
if self.instance is None:
raise AttributeError
return getattr(self.instance, attr)
def create(self, name):
self.instance = self.cppclazz(cpp.sc_core.sc_module_name(str(name)))
return self
class Signal(object):
'''
classdocs
'''
_sc_inout_re = re.compile(r'^sc_core::sc_(?:_in)?out<(.*)>$')
_sc_port_re = re.compile(r'^sc_core::sc_port<[^<]*<(.*)>>$')
def __init__(self, name=None):
self.name=name
self.source=None
self.targets=[]
self.signal=None
self.sig_data_type=None
def src(self, module_port):
self.source=module_port
port_class_name=type(module_port).__cppname__
match = self._sc_inout_re.match(port_class_name)
if match:
self.sig_data_type=match.group(1)
else:
match = self._sc_port_re.match(port_class_name)
if match:
self.sig_data_type=match.group(1)
if self.sig_data_type is None:
raise AttributeError;
py_dt_name=self.sig_data_type.replace("::", ".").replace("<", "[").replace(">", "]")
self.signal = eval("cpp.sc_core.sc_signal[cpp.%s](self.name)" % py_dt_name)
module_port.bind(self.signal)
return self
def sink(self, module_port):
self.targets.append(module_port)
module_port.bind(self.signal)
return self
class Connection(object):
'''
classdocs
'''
def __init__(self):
self.source=None
self.targets=[]
def src(self, module_port):
self.source=module_port
return self
def sink(self, module_port):
self.targets.append(module_port)
self.source.bind(module_port)
return self

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@ -12,9 +12,9 @@ setup(name='PySysC',
long_description=readme(),
classifiers=[
'Development Status :: 3 - Alpha',
'License :: OSI Approved :: Apache 2.0 License',
'License :: OSI Approved :: Apache Software License',
'Programming Language :: Python :: 3.6',
'Topic :: Engineering :: Simulation'
'Topic :: Scientific/Engineering :: Electronic Design Automation (EDA)'
],
keywords='SystemC simulation',
url='https://git.minres.com/SystemC/PySysC',

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@ -22,6 +22,25 @@ intors = scpy.get_inititator_sockets(initiator)
tgts = scpy.get_target_sockets(initiator)
childs = scpy.get_submodules(initiator)
cppyy.cppdef("""
class my_module: public sc_core::sc_module {
public:
sc_core::sc_out<sc_dt::sc_uint<32>> port;
my_module(sc_core::sc_module_name nm):sc_core::sc_module(nm), port("port"){}
};
void bind_port(sc_core::sc_signal<sc_dt::sc_uint<32>>& s, sc_core::sc_out<sc_dt::sc_uint<32>>& p){p(s);}
""")
class MyMod(cpp.sc_core.sc_module):
def __init__(self, name):
cpp.sc_core.sc_module.sc_module()
mod = cpp.my_module(cpp.sc_core.sc_module_name("module"))
sig = cpp.sc_core.sc_signal[cpp.sc_dt.sc_uint[32]]("signal")
mod.port(sig)
mod2 = MyMod("Blah")
initiator.socket.bind(router.target_socket)
for idx,m in enumerate(memories):
router.initiator_socket.at(idx).bind(m.socket)