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https://github.com/riscv-software-src/opensbi.git
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Xiang W
f465413402
Some T-Head based processors, for example the Sophgo SG2044, have a JTLB errata that requires special handling of certain TLB maintenance instructions (sfence.vma). Introduce a sbi_tlb_local_operations structure so platforms can provide custom local TLB flush implementations. Use it to implement the JTLB workaround on affected SoCs (currently Sophgo SG2044). Signed-off-by: Xiang W <wangxiang@iscas.ac.cn> Signed-off-by: Han Gao <gaohan@iscas.ac.cn> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260617112925.1144190-2-wangxiang@iscas.ac.cn Signed-off-by: Anup Patel <anup@brainfault.org>
95 lines
2.3 KiB
C
95 lines
2.3 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Atish Patra <atish.patra@wdc.com>
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __SBI_TLB_H__
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#define __SBI_TLB_H__
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#include <sbi/sbi_types.h>
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#include <sbi/sbi_hartmask.h>
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/* clang-format off */
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#define SBI_TLB_FLUSH_ALL ((unsigned long)-1)
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/* clang-format on */
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struct sbi_scratch;
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enum sbi_tlb_type {
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SBI_TLB_FENCE_I = 0,
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SBI_TLB_SFENCE_VMA,
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SBI_TLB_SFENCE_VMA_ASID,
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SBI_TLB_HFENCE_GVMA_VMID,
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SBI_TLB_HFENCE_GVMA,
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SBI_TLB_HFENCE_VVMA_ASID,
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SBI_TLB_HFENCE_VVMA,
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SBI_TLB_TYPE_MAX,
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};
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struct sbi_tlb_info {
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unsigned long start;
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unsigned long size;
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uint16_t asid;
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uint16_t vmid;
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enum sbi_tlb_type type;
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struct sbi_hartmask smask;
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};
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#define SBI_TLB_INFO_INIT(__p, __start, __size, __asid, __vmid, __type, __src) \
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do { \
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(__p)->start = (__start); \
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(__p)->size = (__size); \
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(__p)->asid = (__asid); \
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(__p)->vmid = (__vmid); \
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(__p)->type = (__type); \
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SBI_HARTMASK_INIT_EXCEPT(&(__p)->smask, (__src)); \
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} while (0)
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#define SBI_TLB_INFO_SIZE sizeof(struct sbi_tlb_info)
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/** Collection of Local TLB operations */
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struct sbi_tlb_local_operations {
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/** Local fence.i */
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void (*local_fence_i)(struct sbi_tlb_info *tinfo);
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/** Local supervisor-mode TLB flush */
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void (*local_sfence_vma)(struct sbi_tlb_info *tinfo);
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/** Local supervisor-mode TLB flush with ASID */
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void (*local_sfence_vma_asid)(struct sbi_tlb_info *tinfo);
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/** Local G-stage TLB flush for a specific VMID */
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void (*local_hfence_gvma_vmid)(struct sbi_tlb_info *tinfo);
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/** Local G-stage TLB flush */
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void (*local_hfence_gvma)(struct sbi_tlb_info *tinfo);
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/** Local VS-stage TLB flush with ASID */
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void (*local_hfence_vvma_asid)(struct sbi_tlb_info *tinfo);
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/** Local VS-stage TLB flush */
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void (*local_hfence_vvma)(struct sbi_tlb_info *tinfo);
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};
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/** Get the local TLB operations */
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const struct sbi_tlb_local_operations *sbi_tlb_get_local_operations(void);
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/** Set the local TLB operations */
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void sbi_tlb_set_local_operations(
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const struct sbi_tlb_local_operations *ops);
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void __sbi_sfence_vma_all();
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int sbi_tlb_request(ulong hmask, ulong hbase, struct sbi_tlb_info *tinfo);
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int sbi_tlb_init(struct sbi_scratch *scratch, bool cold_boot);
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#endif
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