mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 23:41:23 +01:00

As per the RISC-V specification, time value can be obtained from a time CSR implemented in hardware or a MMIO based IP block. Qemu virt machine already supports timer csr while CLINT provides the timer for other platforms. Implement a hart specific timer feature that can be detected at runtime. As CSR based timer implementation are faster than MMIO address based, it is always preferred over MMIO based one. Signed-off-by: Atish Patra <atish.patra@wdc.com> Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu> Reviewed-by: Anup Patel <anup.patel@wdc.com>