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e82d20122d
Add a 32-bit unique ID to plic, aplic, and imsic data which can be used to differentiate multiple irqchip devices. Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com> Link: https://lore.kernel.org/r/20260213055342.3124872-7-anup.patel@oss.qualcomm.com Signed-off-by: Anup Patel <anup@brainfault.org>
53 lines
1.2 KiB
C
53 lines
1.2 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __IRQCHIP_PLIC_H__
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#define __IRQCHIP_PLIC_H__
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#include <sbi/sbi_types.h>
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#include <sbi/sbi_irqchip.h>
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struct plic_data {
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/* Private members */
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struct sbi_irqchip_device irqchip;
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/* Public members */
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u32 unique_id;
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unsigned long addr;
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unsigned long size;
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unsigned long num_src;
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unsigned long flags;
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void *pm_data;
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s16 context_map[][2];
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};
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/** Work around a bug on Ariane that requires enabling interrupts at boot */
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#define PLIC_FLAG_ARIANE_BUG BIT(0)
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/** PLIC must be delegated to S-mode like T-HEAD C906 and C910 */
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#define PLIC_FLAG_THEAD_DELEGATION BIT(1)
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/** Allocate space for power management save/restore operations */
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#define PLIC_FLAG_ENABLE_PM BIT(2)
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#define PLIC_M_CONTEXT 0
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#define PLIC_S_CONTEXT 1
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#define PLIC_DATA_SIZE(__hart_count) (sizeof(struct plic_data) + \
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(__hart_count) * 2 * sizeof(s16))
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#define PLIC_IE_WORDS(__p) ((__p)->num_src / 32 + 1)
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struct plic_data *plic_get(void);
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void plic_suspend(void);
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void plic_resume(void);
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int plic_cold_irqchip_init(struct plic_data *plic);
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#endif
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