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Author SHA1 Message Date
Anup PatelandAnup Patel ecc92e87a9 platform: generic: Optimize extensions_init() to parse ISA extensions once 
Instead of parsing ISA extensions separately for each hart in the
generic_extensions_init() function, it is better to parse ISA extensions
for all available harts in the cold boot path. Also, this allows us
to remove fdt_isa_bitmap from scratch space and directly initialize
"extensions" in struct sbi_hart_features for each hart.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260521082625.1520870-3-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-06-12 16:08:29 +05:30
Anup PatelandAnup Patel a62385ab80 lib: sbi_hart: No need to clear features in hart_detect_features() 
The per-hart features are already zeroed by sbi_scratch_alloc_offset()
for all harts so hart_detect_features() should not explicitly clear
features later.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260521082625.1520870-2-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-06-12 16:08:29 +05:30
Anup PatelandAnup Patel c175c97a27 lib: sbi: Fix LLVM compile error observed in sbi_mpxy.c 
The following LLVM compile error is observed in sbi_mpxy.c:

 CC        lib/sbi/sbi_mpxy.o
lib/sbi/sbi_mpxy.c:535:36: error: result of comparison of constant 18446744073709551615 with
      expression of type 'u32' (aka 'unsigned int') is always false [-Werror,-Wtautological-constant-out-of-range-compare]
  535 |                     (attrs->msi_info.msi_addr_hi == INVALID_ADDR))
      |                      ~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^  ~~~~~~~~~~~~
lib/sbi/sbi_mpxy.c:534:36: error: result of comparison of constant 18446744073709551615 with
      expression of type 'u32' (aka 'unsigned int') is always false [-Werror,-Wtautological-constant-out-of-range-compare]
  534 |                     (attrs->msi_info.msi_addr_lo == INVALID_ADDR) &&
      |                      ~~~~~~~~~~~~~~~~~~~~~~~~~~~ ^  ~~~~~~~~~~~~
2 errors generated.

To address the above issue, add u32 typecast to INVALID_ADDR.

Fixes: e92c8fd083 ("sbi: mpxy: define INVALID_ADDR using unsigned long width")
Fixes: 7939bf1329 ("lib: sbi: Add SBI Message Proxy (MPXY) framework")
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260612062218.172726-1-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-06-12 11:58:21 +05:30
Anup PatelandAnup Patel 8570b93844 lib: sbi_irqchip: Allow irqchip drivers advertise capabilities 
Extend struct sbi_irqchip_device to allow irqchip drivers advertise
interrupt controller capabilities (such as wired interrupt, MSIs, etc).
This further allows other parts of OpenSBI to lookup irqchip devices
based on capabilities.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260608125257.3220114-2-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-06-10 18:13:10 +05:30
Anup PatelandAnup Patel 79e63bc834 lib: sbi_irqchip: Add support for registering MSI handlers 
Some of the drivers (such as APLIC) require capability to registers
MSI handlers from the parent interrupt controller (such as IMSIC)
so add sbi_irqchip_register_msi_handler() for this purpose.

Link: https://lore.kernel.org/r/20260423052339.356900-7-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-12 09:55:58 +05:30
Anup PatelandAnup Patel c0d0dd02b1 lib: sbi_irqchip: Allow setting hardware interrupt affinity 
The irqchip drivers can provide mechanism to set interrupt affinity
so add hwirq_set_affinity() callback for irqchip drivers and use it
to implement sbi_irqchip_set_affinity() which can be used by other
drivers.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260423052339.356900-6-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-12 09:55:58 +05:30
Anup PatelandAnup Patel d861447b0b lib: sbi_irqchip: Allow marking hardware interrupts as reserved 
Some of the hardware interrupts may be special so allow irqchip
drivers to make these hardware interrupts as reserved. Introduce
sbi_irqchip_register_reserved() for this purpose.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260423052339.356900-5-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-12 09:55:58 +05:30
Anup PatelandAnup Patel adb4caf765 lib: sbi_irqchip: Allow interrupt client to specify line sensing 
The interrupt client should be allowed to specify the line sensing
type of the hwirqs for which it is registering handler. To support
this, add hwirq_flags parameter to hwirq_setup() callback provided
by the irqchip driver.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260423052339.356900-4-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-12 09:55:58 +05:30
Anup PatelandAnup Patel 255df5d802 lib: sbi_irqchip: Keep the handler list in sorted order for irqchip 
Let's keep the handler list in sorted order for irqchip so that
it is easier to allocate unused hardware interrupts based on the
sorted list.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260423052339.356900-3-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-12 09:55:58 +05:30
Anup PatelandAnup Patel 0d81a78ec5 lib: sbi_irqchip: Check full range for existing handlers in sbi_irqchip_register_handler() 
Currently, the sbi_irqchip_register_handler() only checks the first and the
last hardware interrupt for existing handlers which is buggy because there
may be existing handlers between the first and the last hardware interrupt.

Fixes: 0ab0c470d5 ("lib: sbi_irqchip: Allow registering interrupt handlers")
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260423052339.356900-2-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-12 09:55:58 +05:30
Anup PatelandAnup Patel ae8f28a868 lib: utils: Fix LLVM compile error in MPXY client driver for RPMI MM 
The following compile error is seen with LLVM compiler:

 CC        platform/generic/lib/utils/mpxy/fdt_mpxy_rpmi_mm.o
lib/utils/mpxy/fdt_mpxy_rpmi_mm.c:17:6: error: use of GNU 'missing =' extension in
      designator [-Werror,-Wgnu-designator]
   17 |         [0] {
      |             ^
      |             =
lib/utils/mpxy/fdt_mpxy_rpmi_mm.c:24:6: error: use of GNU 'missing =' extension in
      designator [-Werror,-Wgnu-designator]
   24 |         [1] {
      |             ^
      |             =
2 errors generated.

Add missing "=" in mm_srvcdata[] array initialization to address
the above issue.

Fixes: 0b041e58c0 ("lib: utils: Add MPXY client driver for RPMI MM service group")
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Reviewed-by: Ranbir Singh <ranbir.singh@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260509161849.2935816-1-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-11 10:08:55 +05:30
Anup PatelandAnup Patel 1932ee3f0a lib: sbi_timer: Introduce sbi_timer_compute_delta() and friends 
The users of timer event have to compute next_event (aka timer value
in the future) based on desired units and unit frequency. Introduce
sbi_timer_compute_delta() and friends to simplify computing next_event
for timer event users.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Link: https://lore.kernel.org/r/20260425104048.2335262-5-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-09 13:16:07 +05:30
Anup PatelandAnup Patel b7fa8a246c lib: sbi_timer: Add support for timer events 
Currently, the sbi_timer only supports timer events configured via
SBI calls. Introduce struct sbi_timer_event and related functions
to allow configuring timer events from any part of OpenSBI.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Link: https://lore.kernel.org/r/20260425104048.2335262-4-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-09 13:16:05 +05:30
Anup PatelandAnup Patel 357fae4820 lib: sbi_timer: Introduce per-HART timer state 
Currently, only time_delta is per-HART so introduce per-HART timer
state for having more per-HART timer information.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Link: https://lore.kernel.org/r/20260425104048.2335262-3-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-09 13:15:43 +05:30
Anup PatelandAnup Patel d8c7dc9cb0 include: sbi: Add sbi_scratch_hartindex() macro 
Add helper macro to extract hart index from scratch pointer. This
can be used to check whether scratch pointer belongs to a particular
hart or not.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Link: https://lore.kernel.org/r/20260425104048.2335262-2-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-09 13:11:13 +05:30
Anup PatelandAnup Patel f34cf05347 platform: Remove kendryte/k210 platform 
The kendryte/k210 platform does not have MMU support in S-mode hence
only NOMMU kernel which runs in M-mode can be used on this platform.

As of now, there is no clear use-case of supporting OpenSBI for
kendryte/k210 platform.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260409045310.2045739-1-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-09 13:05:51 +05:30
Anup PatelandAnup Patel 0ab0c470d5 lib: sbi_irqchip: Allow registering interrupt handlers 
To handle external interrupts in M-mode, the sbi_irqchip framework
must allow registering interrupt handlers from device drivers.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-9-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:55:58 +05:30
Anup PatelandAnup Patel e8ebd1fbc6 lib: sbi_irqchip: Associate 32-bit unique ID for each irqchip device 
Allow locating irqchip device instance using a unique 32-bit ID. This
32-bit unique ID can be set by the irqchip driver at the time of adding
irqchip device.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-8-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:55:08 +05:30
Anup PatelandAnup Patel e82d20122d lib: utils/irqchip: Add unique_id to plic, aplic, and imsic data 
Add a 32-bit unique ID to plic, aplic, and imsic data which can be
used to differentiate multiple irqchip devices.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-7-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:55:03 +05:30
Anup PatelandAnup Patel b55bb4cdcb lib: sbi_irqchip: Support irqchip device targetting subset of harts 
It is possible to have platform where an irqchip device targets
a subset of harts and there are multiple irqchip devices to cover
all harts.

To support this scenario:
1) Add target_harts hartmask to struct sbi_irqchip_device which
   represents the set of harts targetted by the irqchip device
2) Call warm_init() and process_hwirqs() callbacks of an irqchip
   device on a hart only if irqchip device targets that particular
   hart

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-6-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:53:33 +05:30
Anup PatelandAnup Patel 5a300b32d5 lib: utils/irqchip: Add IDC to hartindex map in struct aplic_data 
A platform can have multiple APLICs in direct-mode targetting
different subset of harts. Add APLIC ID to hartindex map in
struct aplic_data to capture the set of harts targeted by a
given APLIC in direct-mode.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-5-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:52:45 +05:30
Anup PatelandAnup Patel 6d68f3bebd lib: utils/irqchip: Fix context_map init in irqchip_plic_update_context_map() 
The context_map[][] elements should be initialized with negative
value so that context_map does not point to anything for non-existent
PLIC contexts.

Fixes: 69448a0790 ("lib: utils/irqchip: plic: Provide a hartindex to context map")
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-4-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:52:43 +05:30
Anup PatelandAnup Patel 2110aab68f lib: sbi_irqchip: Rename irq_handle() callback to process_hwirqs() 
The irq_handle() callback of irqchip device is meant to process
hardware interrupt of the irqchip hence rename it accordingly.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-3-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:52:41 +05:30
Anup PatelandAnup Patel 51837c731b lib: sbi_irqchip: Use chip as variable name for irqchip device 
The irqchip device represents an interrupt controller so use chip
as variable name instead of dev. This will avoid confusion as the
sbi_irqchip framework grows.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-2-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:52:40 +05:30
Anup PatelandAnup Patel 9a46ef43a4 include: Fix LLVM compile error in sbi_utils/hsm/fdt_hsm_sifive_inst.h 
Currently, OpenSBI fails to compile for LLVM=1 using 2025.11.27
riscv-gnu-toolchain with the following error:

In file included from opensbi/lib/utils/suspend/fdt_suspend_sifive_smc0.c:20:
opensbi/include/sbi_utils/hsm/fdt_hsm_sifive_inst.h:17:23: error: expected instruction format
   17 |         __asm__ __volatile__(".insn 0xfc000073" ::: "memory");
      |                              ^
<inline asm>:1:8: note: instantiated into assembly here
    1 |         .insn 0xfc000073
      |               ^
In file included from opensbi/lib/utils/suspend/fdt_suspend_sifive_smc0.c:20:
opensbi/include/sbi_utils/hsm/fdt_hsm_sifive_inst.h:12:23: error: expected instruction format
   12 |         __asm__ __volatile__(".insn 0x30500073" ::: "memory");
      |                              ^
<inline asm>:1:8: note: instantiated into assembly here
    1 |         .insn 0x30500073
      |               ^
2 errors generated.

To fix this compile error, use ".word" in-place ".insn".

Fixes: 1514a32730 ("lib: utils/hsm: Add SiFive TMC0 driver")
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251227100916.327524-1-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2025-12-28 20:47:12 +05:30