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Author SHA1 Message Date
Anup PatelandAnup Patel d8c7dc9cb0 include: sbi: Add sbi_scratch_hartindex() macro 
Add helper macro to extract hart index from scratch pointer. This
can be used to check whether scratch pointer belongs to a particular
hart or not.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Link: https://lore.kernel.org/r/20260425104048.2335262-2-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-09 13:11:13 +05:30
Anup PatelandAnup Patel f34cf05347 platform: Remove kendryte/k210 platform 
The kendryte/k210 platform does not have MMU support in S-mode hence
only NOMMU kernel which runs in M-mode can be used on this platform.

As of now, there is no clear use-case of supporting OpenSBI for
kendryte/k210 platform.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260409045310.2045739-1-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-05-09 13:05:51 +05:30
Anup PatelandAnup Patel 0ab0c470d5 lib: sbi_irqchip: Allow registering interrupt handlers 
To handle external interrupts in M-mode, the sbi_irqchip framework
must allow registering interrupt handlers from device drivers.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-9-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:55:58 +05:30
Anup PatelandAnup Patel e8ebd1fbc6 lib: sbi_irqchip: Associate 32-bit unique ID for each irqchip device 
Allow locating irqchip device instance using a unique 32-bit ID. This
32-bit unique ID can be set by the irqchip driver at the time of adding
irqchip device.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-8-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:55:08 +05:30
Anup PatelandAnup Patel e82d20122d lib: utils/irqchip: Add unique_id to plic, aplic, and imsic data 
Add a 32-bit unique ID to plic, aplic, and imsic data which can be
used to differentiate multiple irqchip devices.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-7-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:55:03 +05:30
Anup PatelandAnup Patel b55bb4cdcb lib: sbi_irqchip: Support irqchip device targetting subset of harts 
It is possible to have platform where an irqchip device targets
a subset of harts and there are multiple irqchip devices to cover
all harts.

To support this scenario:
1) Add target_harts hartmask to struct sbi_irqchip_device which
   represents the set of harts targetted by the irqchip device
2) Call warm_init() and process_hwirqs() callbacks of an irqchip
   device on a hart only if irqchip device targets that particular
   hart

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-6-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:53:33 +05:30
Anup PatelandAnup Patel 5a300b32d5 lib: utils/irqchip: Add IDC to hartindex map in struct aplic_data 
A platform can have multiple APLICs in direct-mode targetting
different subset of harts. Add APLIC ID to hartindex map in
struct aplic_data to capture the set of harts targeted by a
given APLIC in direct-mode.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-5-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:52:45 +05:30
Anup PatelandAnup Patel 6d68f3bebd lib: utils/irqchip: Fix context_map init in irqchip_plic_update_context_map() 
The context_map[][] elements should be initialized with negative
value so that context_map does not point to anything for non-existent
PLIC contexts.

Fixes: 69448a0790 ("lib: utils/irqchip: plic: Provide a hartindex to context map")
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-4-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:52:43 +05:30
Anup PatelandAnup Patel 2110aab68f lib: sbi_irqchip: Rename irq_handle() callback to process_hwirqs() 
The irq_handle() callback of irqchip device is meant to process
hardware interrupt of the irqchip hence rename it accordingly.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-3-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:52:41 +05:30
Anup PatelandAnup Patel 51837c731b lib: sbi_irqchip: Use chip as variable name for irqchip device 
The irqchip device represents an interrupt controller so use chip
as variable name instead of dev. This will avoid confusion as the
sbi_irqchip framework grows.

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-2-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2026-03-22 10:52:40 +05:30
Anup PatelandAnup Patel 9a46ef43a4 include: Fix LLVM compile error in sbi_utils/hsm/fdt_hsm_sifive_inst.h 
Currently, OpenSBI fails to compile for LLVM=1 using 2025.11.27
riscv-gnu-toolchain with the following error:

In file included from opensbi/lib/utils/suspend/fdt_suspend_sifive_smc0.c:20:
opensbi/include/sbi_utils/hsm/fdt_hsm_sifive_inst.h:17:23: error: expected instruction format
   17 |         __asm__ __volatile__(".insn 0xfc000073" ::: "memory");
      |                              ^
<inline asm>:1:8: note: instantiated into assembly here
    1 |         .insn 0xfc000073
      |               ^
In file included from opensbi/lib/utils/suspend/fdt_suspend_sifive_smc0.c:20:
opensbi/include/sbi_utils/hsm/fdt_hsm_sifive_inst.h:12:23: error: expected instruction format
   12 |         __asm__ __volatile__(".insn 0x30500073" ::: "memory");
      |                              ^
<inline asm>:1:8: note: instantiated into assembly here
    1 |         .insn 0x30500073
      |               ^
2 errors generated.

To fix this compile error, use ".word" in-place ".insn".

Fixes: 1514a32730 ("lib: utils/hsm: Add SiFive TMC0 driver")
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20251227100916.327524-1-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
 2025-12-28 20:47:12 +05:30