 Chao-ying FuandAnup Patel
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1ffbd063c4
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generic: mips: support harts to boot from mips_warm_boot
We program reset base for harts (other than hart 0) to boot at
mips_warm_boot that jumps to _start_warm. This helps to skip some code
sequence to speed up.
Signed-off-by: Chao-ying Fu <cfu@mips.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250723204010.9927-1-cfu@mips.com
Signed-off-by: Anup Patel <anup@brainfault.org>
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2025-08-28 11:00:16 +05:30 |
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Chao-ying FuandAnup Patel
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66ab965e54
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platform: generic: mips: add P8700
Extend generic platform to support MIPS P8700.
Signed-off-by: Chao-ying Fu <cfu@mips.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250522212141.3198-2-cfu@mips.com
Signed-off-by: Anup Patel <anup@brainfault.org>
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2025-06-14 21:44:11 +05:30 |
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Chao-ying FuandAnup Patel
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8a3071222a
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lib: Emulate AMO instructions when Zaamo is not available
The AMO instructions are very critical for Linux so allow low-end
RISC-V implementations without Zaamo to boot Linux by emulating AMO
instructions using Zalrsc when OpenSBI is compiled without Zaamo.
Signed-off-by: Chao-ying Fu <cfu@mips.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Link: https://lore.kernel.org/r/20250519121207.976949-1-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
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2025-05-20 09:18:03 +05:30 |
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Chao-ying FuandAnup Patel
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995f226f3f
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lib: Emit lr and sc instructions based on -march flags
When -march=rv64im_zalrsc_zicsr is used, provide atomic operations
and locks using lr and sc instructions only.
Signed-off-by: Chao-ying Fu <cfu@mips.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20250226014727.19710-1-cfu@mips.com
Signed-off-by: Anup Patel <anup@brainfault.org>
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2025-03-28 18:52:05 +05:30 |
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