Yu Chien Peter Lin and Anup Patel
88f58a3694
platform: andes/ae350: Use fdt serial driver
...
Andes UART is compatible with uart8250 driver. We can use
fdt_serial_init() as platform console init hook.
dts example:
serial0: serial@f0300000 {
compatible = "andestech,uart16550", "ns16550a";
reg = <0x00000000 0xf0300000 0x00000000 0x00001000>;
interrupts = <9 4>;
interrupt-parent = <&plic0>;
clock-frequency = <19660800>;
current-speed = <38400>;
reg-shift = <2>;
reg-offset = <32>;
reg-io-width = <4>;
no-loopback-test = <1>;
};
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2022-10-23 10:26:06 +05:30
Yu Chien Peter Lin and Anup Patel
9899b59beb
platform: andes/ae350: Use kconfig to set platform version and default name
...
This patch makes andes platform name and version can be set in
menuconfig interface.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com >
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2022-10-23 10:25:13 +05:30
Yu Chien Peter Lin and Anup Patel
bd7ef41398
platform: andes/ae350: Remove enabling cache from an350_final_init
...
The boot-time cache operations have been handled by U-boot SPL, so we
can drop duplicate code.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com >
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2022-10-23 10:23:13 +05:30
Yu Chien Peter Lin and Anup Patel
dcdaf30274
lib: sbi: Add sbi_domain_root_add_memrange() API
...
This patch generalizes the logic to add a memory range with desired
alignment and flags of consecutive regions to the root domain.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2022-10-23 10:21:21 +05:30
Yu Chien Peter Lin and Anup Patel
60b78fee92
include: sbi: Fix grammar in comment
...
Fix minor grammar issue in function description.
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2022-10-23 10:20:04 +05:30
Yu Chien Peter Lin and Anup Patel
11d14ae7f2
lib: sbi: Fix typo in comment
...
%s/is is/is
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2022-10-23 10:19:28 +05:30
Yu Chien Peter Lin and Anup Patel
98aa12738d
include: sbi: Fix typo in comment
...
%s/Priviledge/Privilege
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com >
Reviewed-by: Anup Patel <anup@brainfault.org >
2022-10-23 10:17:22 +05:30
