This patch extends/revamps create-binary-archive.sh to allow creating
unified binary tar ball containing both RV32 and RV64 images. Users
can also create "RV32 only" or "RV64 only" tar balls as well.
Few example commands are as follows:
./scripts/create-binary-archive.sh (Build both RV32 & RV64 images)
./scripts/create-binary-archive.sh -x 32 (Build RV32 only images)
./scripts/create-binary-archive.sh -x 64 (Build RV64 only images)
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The FU540_ENABLED_HART_MASK compile time option was added for initial
bring-up on SiFive Unleashed. This option is redundant now because
disabled_hart_mask is already removed. Based on this rationale, we
remove FU540_ENABLED_HART_MASK compile time option.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
A platform can have discontinuous and/or sparse HART ids so we
cannot always assume a set of HARTs with continuous HART ids.
This patch adds support for discontinuous and sparse HART ids by
introducing HART index to HART id table. This table has platform
hart_count entries and it maps HART index to HART id.
The HART index to HART id table has only two restrictions:
1. HART index < sbi_platform hart_count
2. HART id < SBI_HARTMASK_MAX_BITS
Example1:
Let's say we have a platform with 2 HART ids 11 and 22, for such a
a platform:
hart_count = 2
hart_index2id[0] = 11
hart_index2id[1] = 22
Example2:
Let's say we have a platform with 5 HARTs ids 0, 1, 2, 3, and 4
but out of these HART with id 0 is not usable so for such a platform:
hart_count = 5
hart_index2id[0] = -1U
hart_index2id[1] = 1
hart_index2id[2] = 2
hart_index2id[3] = 3
hart_index2id[4] = 4
OR
hart_count = 4
hart_index2id[0] = 1
hart_index2id[1] = 2
hart_index2id[2] = 3
hart_index2id[3] = 4
With HART index to HART id table in place, the hart_disabled()
callback is now redundant so we remove it as well.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We don't need to use sbi_platform_hart_count() in sbi_init and
sbi_scratch because checking sbi_platform_hart_disabled() or
return value of sbi_hartid_to_scratch() is sufficient.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Checking return value of sbi_hartid_to_scratch() is sufficient
so no need to explicitly check for disabled HART using the
sbi_platform_hart_disabled() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The scratch parameter in sbi_hsm_hart_started_mask() API is now
redundant hence removing it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We remove usage of sbi_platform_hart_count() API from sbi_hsm
so that discontinuous and sparse HART ids can be supported.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As a step towards supporting discontinuous and sparse HART ids, we
don't set hartid_to_scratch table for disabled HARTs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The sbi_platform_hart_disabled() should return TRUE for HART id
greater than platform hart count.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The sbi_hartid_to_scratch() API can fail for non-existent HARTs so
all uses of sbi_hartid_to_scratch() API should check return value.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch simplify HART id to scratch macro as follows:
1. Remove current "scratch" pointer argument because now we
use HART id to scratch table
2. Rename sbi_hart_id_to_scratch() to sbi_hartid_to_scratch()
to have macro name consistent with the name of callback
in struct sbi_scratch
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Instead of calling hartid_to_scratch() callback every time when
we want sbi_scratch pointer from HART id, we create a table of
sbi_scratch pointers and use that to get sbi_scratch pointer.
As a result of HART id to scratch table, the conversion of
HART id to sbi_scratch pointer is just 2-3 instructions which
was 9 instructions previously.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The default install directory is not being removed correctly by
distclean make target due to recent changes. This patch fixes
distclean make target to fix default install directory removal.
Fixes: 82ae8e8fe2 ("makefile: Do setup of the install target
more flexible")
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The sbi_current_hartid() being a regular function is quite
expensive because for callers it is a function call instead
of a direct CSR read. This patch converts sbi_current_hartid()
into a macro in riscv_asm.h.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Now that sbi_hart_id_to_scratch() is optimized, we don't need
the "if ()" statement. Also, the hstate local variable is
redundant so we remove that as well.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch optimizes _hartid_to_scratch() in following ways:
1. Use caller saved registers instead of callee saved registers
so that we don't need to save/restore registers on stack
2. Remove second redundant mul instruction by re-arranging
instructions
Overall, we reduce 9 instructions in _hartid_to_scratch()
implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The sbi_hart_id_to_scratch() just forwards call to firmware specific
hartid_to_scratch() callback so we make sbi_hart_id_to_scratch() as
macro in sbi_scratch.h instead of regular function in sbi_hart.c.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The HART available mask and related APIs are now totally redundant
because of more extensive HART state machine implemented by sbi_hsm.
Due to above, we remove HART available mask and related APIs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch replaces use of sbi_hart_available_mask() API with
sbi_hsm_hart_started_mask() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch replaces use of sbi_hart_available_mask() API with
sbi_hsm_hart_started_mask() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch replaces use of sbi_hart_available_mask() API with
sbi_hsm_hart_started_mask API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch introduce sbi_hsm_hart_started_mask() API as
a replacement of sbi_hart_available_mask() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The disabled_hard_mask in sbi_platform is only 64bits wide so we
cannot disable a HART with HARTID > 63. To tackle this, we remove
disabled_hart_mask and replace it with hart_disabled() platform
callback.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The coldboot_wait_bitmap is of fixed size and has __riscv_xlen
bits. This limits us to scale beyond __riscv_xlen HARTs hence
we replace coldboot_wait_bitmap with coldboot_wait_hmask which
is of type struct sbi_hartmask.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The coldboot wait APIs are only used by sbi_init.c so no point in
having coldboot related code in sbi_hart.c.
As per-above rationale, we move all coldboot wait related APIs to
sbi_init.c as static/local functions.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Instead of using single ulong as source mask for sbi_tlb_info,
we use sbi_hartmask. This way sbi_tlb_info can easily scale
for large number of HARTs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We introduce SBI_TLB_INFO_INIT() helper macro to help easy
initialization of struct sbi_tlb_info which is passed to the
sbi_tlb_request() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We only allow HARTs with HARTID less than SBI_HARTMASK_MAX_BITS in
sbi_init() function so that sbi_hartmask can safely used across
OpenSBI sources.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We add a simple hartmask library to create and maintain HART mask
in different parts of OpenSBI sources. This new library is build
as wrapper library on-top-of bitmap library.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We add simple bitmap library which will help us create and maintain
bitmaps. It will also help us create a simple HART mask library.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Currently, the per-HART scratch size is 256 bytes on RV32 and
512 bytes on RV64. This patch set per-HART scratch size to 4KB
(4096 bytes) for both RV32 and RV64 so that we don't run-out
of scratch space anytime soon.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
All platform except kendryte/k210 use 8KB of per-HART stack hence
this patch set per-HART stack size of kendryte/k210 to 8KB for
consistency.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch extends our bit operation library with mechanism to:
1. Iteratively traverse bits
2. Set bit
3. Clear bit
4. Change bit
5. ... other helpful functions ...
Most the above is adopted from Xvisor sources.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The right location for all bits related defines and macros is
sbi_bitops.h hence this patch. With this patch, the sbi_bits.h
is redundant so we remove it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We don't need to separately call sbi_ipi_send() for current HART
in sbi_ipi_send_many(). Instead, we can simplify the for-loop in
sbi_ipi_send_many() and call sbi_ipi_send() for all HARTs in the
for-loop itself.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We print MIDELEG and MEDELEG CSRs as part of boot prints so that
boot log shows the interrupts and exceptions delegated to S-mode.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The MIDELEG and MEDELEG CSR checks at end of delegate_traps() were
added for initial bring-up on SiFive Unleashed and QEMU. These
checks are not required any more and in-future these checks can
cause failures because some of the MIDELEG/MEDELEG bits will be
hard-wired to 0 or 1.
For related discussion, refer github issue:
https://github.com/riscv/opensbi/issues/157
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This reverts commit 897b8fbdd9.
We are seeing compile errors using newlib based GCC cross-toolchain
so we restore back old ctz() implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
This patch adds documentation to build and run OpenSBI on
Spike simulator and QEMU Spike machine.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
The Spike platform support works perfectly fine on QEMU RV64 Spike
machine and Spike emulator.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch removes stale options from config.mk files of
Ariane FPGA and QEMU virt platform support.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch factor-out SBI base extension into its own source
for better modularity of SBI implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch factor-out SBI vendor extension into its own source
for better modularity of SBI implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch factor-out SBI replacement extensions (such as RFENCE,
IPI, and TIME) into its own source for better modularity of SBI
implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch factor-out SBI legacy extension into its own source
for better modularity of SBI implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch extends our SBI ecall implementation to allow
dynamic registration of various SBI extensions. Using this
dynamic registration we can break-up SBI ecall implementation
into multiple files and even register experimental/custom
SBI extensions from platform code.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Currently, the remote TLB management is initialized via IPI init
which is counter intuitive. This patch initializes remote TLB
management directly from init_coldboot() and init_warmboot()
after IPI init is done.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch drops _fifo from the name of various sbi_tlb_fifo_xyz()
functions because all these functions deal with remote TLB managment
and FIFO is the per-HART data structure used internally by remote
TLB implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch introduces sbi_ipi_event_create/destroy() APIs and
struct sbi_ipi_event_ops for creating/destroying IPI events
at runtime based of event operations.
This new APIs will help platform code and utils code to create
custom IPI events which are not part of generic OpenSBI library.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Instead of directly calling sbi_ipi_send_many(), we introduce
sbi_tlb_fifo_request() for halting a set of HARTs.
This way in future we can assign any IPI event number for remote
FENCE within sbi_tlb.c only.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Instead of directly calling sbi_ipi_send_many(), we introduce
sbi_ipi_send_halt() for halting a set of HARTs.
This way in future we can assign any IPI event number for HART
halting within sbi_ipi.c only.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Instead of directly calling sbi_ipi_send_many(), we introduce
sbi_ipi_send_smode() for injecting S-mode software interrupts.
This way in future we can assign any IPI event number for S-mode
IPIs within sbi_ipi.c only.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The struct sbi_ipi_data is only used in sbi_ipi.c so move it
to sbi_ipi.c from sbi_ipi.h.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch fixes a minor typo in comment for SBI_SCRATCH_SIZE define.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
With U-Boot v2020.01, the SiFive FU540 DTB required by U-Boot is
embedded in U-Boot binary itself so we don't need to do anything
special for U-Boot v2020.01 as payload to OpenSBI firmware.
This patch updates SiFive FU540 documenation assuming we use
latest U-Boot v2020.01 release.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
We add sbi_init_count() API which provides number of times a
given HART completed init sequence (warmboot/coldboot).
This will be very useful in debugging. With upcoming SBI HSM
extension, it will also help in implementing one-time init
code for each HART.
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We should zero-out memory allocated from extra scratch space using
sbi_scratch_alloc_offset() API hence this patch. This will not
impact performance because we mostly allocate from extra scratch
space only at cold boot time.
Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We improve sbi_system_reboot() an sbi_system_shutdown() by:
1. Calling halt IPI to all harts (except current HART) before
calling platform reboot/shutdown hook.
2. Calling sbi_exit() instead of sbi_hang() in-case platform
reboot/shutdown hook failed.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Instead of doing sbi_hang() we should do sbi_exit() upon
halt IPI.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Currently, sbi_hart_wait_for_coldboot() leaves MIE.MSIP bit
set when it returns which is not correct because MIE.MSIP
should be left enabled only by sbi_ipi_init().
This patch does save/restore of MIE CSR to ensure that MIE
CSR is in original state after sbi_hart_wait_for_coldboot()
returns.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We add sbi_ipi_exit() API for exit path handling in sbi_exit()
implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We add sbi_timer_exit() API for OpenSBI exit path handling in
sbi_exit() implementation.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch adds system-level early_exit and final_exit APIs
with corresponding platform hooks. These new APIs will be
primarily used by sbi_exit() in OpenSBI exit path.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch adds initial implementation of sbi_exit() API which
can be used to perform OpenSBI exit sequence for current HART.
The sbi_exit() implementation will be further extended by
subsequent patches.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We remove unnecessary checks related to hart hotplug and disabled
hart in coldboot and warmboot init path.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
It is possible to have a CLINT implementation which supports
only 32bit MMIO accesses on RV64 system so this patch extends
our CLINT driver such that platform code can specify whether
CLINT supports 64bit MMIO access.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra<atish.patra@wdc.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
The state of a0, a1, and a2 registers in fw_prev_arg1() and
fw_next_arg1() is same as passed by previous booting stage
so we add this info in comments for both these functions.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
We should use MTINST CSR in misaligned load/store emulation whenever
possible to avoid unpriv read in getting trapped instruction. This will
improve preformance on HW having proper implementation of MTINST CSR.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
The hypervisor v0.5 spec introduces two new CSRs for both M-mode
and HS-mode which need to be considered when redirecting traps
hence this patch.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
We should treat load guest page fault in sbi_get_insn() as
fetch guest patch fault.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
We have two new trap CSRs namely mtval2 and mtinst when
RISC-V hypervisor extension is available hence we extend
struct sbi_trap_info accordingly.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
As-per RISC-V hypervisor v0.5 spec, we have new guest page faults
which need to be delegated to HS-mode.
Also, we can have bits in in MIDELEG and MEDELEG hardwired to 1
which means we need to fix the sainty check on these CSRs at the
end of delegate_traps() function.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
With RISC-V H-extension v0.5 draft, we have special support for guest
external interrupts so this patch adds related defines which were
missed-out previously.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
The out_tcause and out_tval parameters are not sufficient for most
sbi_ecall functions because this will grow in-future when we support
RISC-V hypervisor v0.5 draft. We replace these parameters with out_trap
which is a pointer to struct sbi_trap_info.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The unpriv APIs can be useful to external firmware and out-of-tree
platform support code.
This patch adds "sbi_" prefix to unpriv load/store APIs and rename
struct riscv_unpriv to struct sbi_trap_info everywhere. We also
place struct sbi_trap_info in sbi/sbi_trap.h so that we can use
it for sbi_trap_redirect() as well.
Overall, this patch will make naming of unpriv APIs consistent
with other OpenSBI APIs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We don't need to set VSSTATUS.MXR bit in get_insn() for
unpriv instruction read because MSTATUS.MXR bit applies
to both "Stage1" and "Stage2" page tables.
This also allows us to remove the "virt" parameter of
get_insn() function.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We simplify struct unpriv_trap by removing ilen member. This
can be achieved by ensuring that at all unpriv load/store
instructions are 4 bytes long using GCC assembler option.
Additionally, this also reduces few instructions from unpriv
load/store functions.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
It has been reported that link address range of previous booting stage
(such as U-Boot SPL) can overlap the link address rage of FW_DYNAMIC.
This means self-relocation in FW_DYNAMIC can potentially corrupt
previous booting stage if any of the secondary HART enter FW_DYNAMIC
before primary HART.
To tackle this, we add preferred boot HART field (i.e boot_hart) in
struct fw_dyanmic_info. We use this field to force secondary HARTs
into relocation wait loop till preferred/primary boot HART enters
FW_DYNAMIC completes self-relocation. If preferred boot HART is not
available then we fall back to relocation lottery approach.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The riscv_encoding.h is shared with assembly sources so we use
_UL() and _ULL() for register fields related defines.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch sync-up encoding header with the latest privilege
specifications draft v1.12 and hypervisor specifications draft v0.5.
The MSTATUS.MTL and HSTATUS.STL bits are not present anymore and
will be removed by another patch series for hypervisor v0.5-draft.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Instead of forcing HART0 to do the relocation and scratch init
work, we should have an atomic lottery to decide which HART does
the relocation and scratch init.
This way any HART can be boot/main HART.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We get following compile error for FW_PAYLOAD with latest GCC
binutils:
fw_payload.o(.text+0x1961): 15 bytes required for alignment to 16-byte
boundary, but only 14 present
Further investigating, it turn-out to be a known issue with RISC-V
GCC binutils.
(Refer, https://github.com/riscv/riscv-gnu-toolchain/issues/298)
As a work-around, we disable relaxation when including DTB and
PAYLOAD binary in fw_payload.S.
Reported-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: David Abdurachmanov <david.abdurachmanov@sifive.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
If we are running on RISC-V emulator/simulator with large number of
HARTs where each HART is a regular thread under UNIX host then it is
possible that some of the secondary HARTs don't get chance to run and
sbi_hart_wake_coldboot_harts() is called before secondary HARTs call
sbi_hart_wait_for_coldboot(). In this situation, some of the secondary
HARTs will never come-out of coldboot wait loop.
To tackle this, we introduce a global flag coldboot_done which will
be protected by coldboot lock and it will be set by primary HART from
sbi_hart_wake_coldboot_harts() before waking-up secondary HARTs. We
also re-arrange acquire/release of coldboot lock to reduce further
chances of race-condition.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Zong Li <zong.li@sifive.com>
Reviewed-by: Nylon Chen<nylon7@andestech.com>
Currently, if someone has forked OpenSBI repo quite sometime back
and this fork is not having updated tags from upstream riscv/opensbi
repo then "git describe" command can fail. To tackle this, we redirect
error output of "git describe" to /dev/null.
Signed-off-by: Anup Patel <anup.pate@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
For platforms not having TIME CSR, we trap-n-emulate TIME CSR
read/write in OpenSBI. Same rationale applies to HTIMEDELTA CSR
as well so we trap-n-emulate HTIMEDELTA CSR for platforms not
having TIME CSR.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Current implementation of get_insn() is not suitable for reading
instruction from VS/VU mode because we have to set SSTATUS_MXR bit
in VSSTATUS CSR for reading instruction from VS/VU mode.
This patch extends get_insn() to read instruction from VS/VU mode.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
The WFI will trap as illegal instruction trap when executed
in VS/VU mode so we just forward/redirect it to HS-mode so
that hypervisor can deal with it appropriately.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
When hypervisor extension is available, we can get traps from VS/VU
modes. We should be able to force redirect some of these traps to
HS-mode. In other words, we should be able forward traps from VS/VU
mode to HS-mode using sbi_trap_redirect() hence this patch.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
This patch extends sbi_hart_switch_mode() to support entering
VS/VU modes when hypervisor extension is available.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
When hypervisor extension is available, we only handle hypervisor
ecalls coming from HS-mode and we let hypervisor handle ecalls coming
from VS-mode.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
We can get a page/access trap when doing unpriv load/store in
get_insn() function because on a SMP system Linux swapper running
on HART A can unmap pages from page table used by HART B.
To tackle this we extend get_insn() implementation so that if
we get trap in get_insn() then we redirect it to S-mode as fetch
page/access fault.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
We should sbi_dprintf() instead of sbi_printf() for invalid CSRs
because we are forwarding invalid CSR access back to S-mode.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
This patch introduces new sbi_dprintf() API for runtime debug
prints. The sbi_dprintf() will print to console for a given
HART only when SBI_SCRATCH_DEBUG_PRINTS option in enabled in
sbi_scratch for this HART.
We can now add debug prints using sbi_dprintf() at important
places in OpenSBI sources. These debug prints will only show
up when previous booting stage or compile time parameter sets
the SBI_SCRATCH_DEBUG_PRINTS option in scratch space.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
