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platform: generic: mips p8700: access CM registers via match data

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Modify the coherence manager register accessors to use the global variable
p8700_cm_info instead of the statically declared GLOBAL_CM_BASE array.

Also use p8700_cm_info to get the number of coherence managers and their
base addresses in mips_p8700_early_init() and mips_p8700_nascent_init().

Clean up the hard-coded values in mips/board.h, access to the coherence
manager is now fully based on information provided by platform compatible
from the device tree.

Signed-off-by: Benoît Monin <benoit.monin@bootlin.com>
Signed-off-by: Vladimir Kondratiev <vladimir.kondratiev@mobileye.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260223-for-upstream-eyeq7h-v3-9-621d004d1a21@mobileye.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Vladimir Kondratiev
2026-02-23 16:54:48 +02:00
committed by Anup Patel
parent bc2722b0f3
commit fe82238d29
3 changed files with 19 additions and 33 deletions
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15
platform/generic/include/mips/board.h
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@@ -10,21 +10,6 @@
/* Please review all defines to change for your board. */
/* Use in stw.S, p8700.c, p8700.h, mips-cm.h */
#define CM_BASE 0x16100000
/* Use in mips-cm.h, p8700.c */
#define CLUSTERS_IN_PLATFORM 1
#if CLUSTERS_IN_PLATFORM > 1
/* Define global CM bases for cluster 0, 1, 2, and more. */
#define GLOBAL_CM_BASE0 0
#define GLOBAL_CM_BASE1 0
#define GLOBAL_CM_BASE2 0
#endif
/* Use in stw.S */
#define TIMER_ADDR (CM_BASE + 0x8050)
/* Use in cps-vec.S */
#define DRAM_ADDRESS 0x80000000
#define DRAM_SIZE 0x80000000