Mirrors/opensbi
3
0
Fork 1
mirror of https://github.com/riscv-software-src/opensbi.git synced 2026-04-13 06:11:37 +01:00
Code Issues Packages Projects Releases Wiki Activity

lib: sbi_irqchip: Support irqchip device targetting subset of harts

Browse Source 
It is possible to have platform where an irqchip device targets
a subset of harts and there are multiple irqchip devices to cover
all harts.

To support this scenario:
1) Add target_harts hartmask to struct sbi_irqchip_device which
   represents the set of harts targetted by the irqchip device
2) Call warm_init() and process_hwirqs() callbacks of an irqchip
   device on a hart only if irqchip device targets that particular
   hart

Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260213055342.3124872-6-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Anup Patel
2026-02-13 11:23:39 +05:30
committed by Anup Patel
parent 5a300b32d5
commit b55bb4cdcb
5 changed files with 74 additions and 23 deletions
Download Patch File Download Diff File Expand all files Collapse all files

65
lib/sbi/sbi_irqchip.c
View File

@@ -10,36 +10,65 @@
#include <sbi/sbi_irqchip.h>
#include <sbi/sbi_list.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_scratch.h>
struct sbi_irqchip_hart_data {
struct sbi_irqchip_device *chip;
};
static unsigned long irqchip_hart_data_off;
static SBI_LIST_HEAD(irqchip_list);
static int default_irqfn(void)
{
return SBI_ENODEV;
}
static int (*ext_irqfn)(void) = default_irqfn;
int sbi_irqchip_process(void)
{
return ext_irqfn();
struct sbi_irqchip_hart_data *hd;
hd = sbi_scratch_thishart_offset_ptr(irqchip_hart_data_off);
if (!hd || !hd->chip || !hd->chip->process_hwirqs)
return SBI_ENODEV;
return hd->chip->process_hwirqs(hd->chip);
}
void sbi_irqchip_add_device(struct sbi_irqchip_device *chip)
int sbi_irqchip_add_device(struct sbi_irqchip_device *chip)
{
sbi_list_add_tail(&chip->node, &irqchip_list);
struct sbi_irqchip_hart_data *hd;
struct sbi_scratch *scratch;
u32 h;
if (chip->process_hwirqs)
ext_irqfn = chip->process_hwirqs;
if (!chip || !sbi_hartmask_weight(&chip->target_harts))
return SBI_EINVAL;
if (chip->process_hwirqs) {
sbi_hartmask_for_each_hartindex(h, &chip->target_harts) {
scratch = sbi_hartindex_to_scratch(h);
if (!scratch)
continue;
hd = sbi_scratch_offset_ptr(scratch, irqchip_hart_data_off);
if (hd->chip && hd->chip != chip)
return SBI_EINVAL;
hd->chip = chip;
}
}
sbi_list_add_tail(&chip->node, &irqchip_list);
return 0;
}
int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
{
int rc;
const struct sbi_platform *plat = sbi_platform_ptr(scratch);
struct sbi_irqchip_hart_data *hd;
struct sbi_irqchip_device *chip;
int rc;
if (cold_boot) {
irqchip_hart_data_off =
sbi_scratch_alloc_offset(sizeof(struct sbi_irqchip_hart_data));
if (!irqchip_hart_data_off)
return SBI_ENOMEM;
rc = sbi_platform_irqchip_init(plat);
if (rc)
return rc;
@@ -48,12 +77,15 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
sbi_list_for_each_entry(chip, &irqchip_list, node) {
if (!chip->warm_init)
continue;
if (!sbi_hartmask_test_hartindex(current_hartindex(), &chip->target_harts))
continue;
rc = chip->warm_init(chip);
if (rc)
return rc;
}
if (ext_irqfn != default_irqfn)
hd = sbi_scratch_thishart_offset_ptr(irqchip_hart_data_off);
if (hd && hd->chip && hd->chip->process_hwirqs)
csr_set(CSR_MIE, MIP_MEIP);
return 0;
@@ -61,6 +93,9 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)
void sbi_irqchip_exit(struct sbi_scratch *scratch)
{
if (ext_irqfn != default_irqfn)
struct sbi_irqchip_hart_data *hd;
hd = sbi_scratch_thishart_offset_ptr(irqchip_hart_data_off);
if (hd && hd->chip && hd->chip->process_hwirqs)
csr_clear(CSR_MIE, MIP_MEIP);
}