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https://github.com/riscv-software-src/opensbi.git
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lib: sbi: Move hart PMP functions to sbi_hart_pmp.c
The sbi_hart_pmp.c looks like a good place for the hart PMP CSR access functions. Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org> Link: https://lore.kernel.org/r/20260430045528.420437-9-npiggin@gmail.com Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Nicholas Piggin
committed by
Anup Patel
Anup Patel
parent
63350c6ea6
commit
a59c8fb9fb
@@ -81,8 +81,6 @@
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#ifndef __ASSEMBLER__
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#include <sbi/sbi_types.h>
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#define csr_swap(csr, val) \
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({ \
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register unsigned long __v = (unsigned long)(val); \
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@@ -211,18 +209,6 @@ int misa_xlen(void);
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/* Get RISC-V ISA string representation */
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void misa_string(int xlen, char *out, unsigned int out_sz);
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/* Disable pmp entry at a given index */
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int sbi_hart_pmp_disable(unsigned int n);
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/* Check if the matching field is set */
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bool sbi_hart_is_pmp_enabled(unsigned int n);
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int sbi_hart_pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
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unsigned long log2len);
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int sbi_hart_pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
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unsigned long *log2len);
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#endif /* !__ASSEMBLER__ */
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#endif
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@@ -9,6 +9,18 @@
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#include <sbi/sbi_types.h>
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/* Disable pmp entry at a given index */
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int sbi_hart_pmp_disable(unsigned int n);
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/* Check if the matching field is set */
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bool sbi_hart_is_pmp_enabled(unsigned int n);
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int sbi_hart_pmp_set(unsigned int n, unsigned long prot,
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unsigned long addr, unsigned long log2len);
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int sbi_hart_pmp_get(unsigned int n, unsigned long *prot_out,
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unsigned long *addr_out, unsigned long *log2len);
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struct sbi_scratch;
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unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch);
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@@ -272,112 +272,3 @@ void csr_write_num(int csr_num, unsigned long val)
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#undef switchcase_csr_write_2
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#undef switchcase_csr_write
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}
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static int hart_pmp_read(pmp_t *pmp, unsigned int n)
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{
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int pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;
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unsigned long cfgmask;
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/* check parameters */
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if (n >= PMP_COUNT)
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return SBI_EINVAL;
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/* calculate PMP register and offset */
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#if __riscv_xlen == 32
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pmpcfg_csr = CSR_PMPCFG0 + (n >> 2);
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pmpcfg_shift = (n & 3) << 3;
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#elif __riscv_xlen == 64
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pmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;
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pmpcfg_shift = (n & 7) << 3;
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#else
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# error "Unexpected __riscv_xlen"
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#endif
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pmpaddr_csr = CSR_PMPADDR0 + n;
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cfgmask = (0xffUL << pmpcfg_shift);
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pmp->cfg = (csr_read_num(pmpcfg_csr) & cfgmask) >> pmpcfg_shift;
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pmp->addr = csr_read_num(pmpaddr_csr);
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return SBI_OK;
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}
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static int hart_pmp_write(pmp_t *pmp, unsigned int n)
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{
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int pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;
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unsigned long cfgmask, pmpcfg;
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/* check parameters */
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if (n >= PMP_COUNT)
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return SBI_EINVAL;
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/* calculate PMP register and offset */
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#if __riscv_xlen == 32
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pmpcfg_csr = CSR_PMPCFG0 + (n >> 2);
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pmpcfg_shift = (n & 3) << 3;
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#elif __riscv_xlen == 64
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pmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;
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pmpcfg_shift = (n & 7) << 3;
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#else
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# error "Unexpected __riscv_xlen"
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#endif
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pmpaddr_csr = CSR_PMPADDR0 + n;
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/* write csrs */
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csr_write_num(pmpaddr_csr, pmp->addr);
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cfgmask = ~(0xffUL << pmpcfg_shift);
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pmpcfg = (csr_read_num(pmpcfg_csr) & cfgmask);
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pmpcfg |= (((unsigned long)pmp->cfg << pmpcfg_shift) & ~cfgmask);
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csr_write_num(pmpcfg_csr, pmpcfg);
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return SBI_OK;
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}
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int sbi_hart_pmp_disable(unsigned int n)
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{
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pmp_t pmp;
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int rc;
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rc = hart_pmp_read(&pmp, n);
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if (rc)
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return rc;
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pmp.cfg = 0;
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return hart_pmp_write(&pmp, n);
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}
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bool sbi_hart_is_pmp_enabled(unsigned int n)
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{
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pmp_t pmp;
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if (hart_pmp_read(&pmp, n) != SBI_OK)
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return false;
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return sbi_pmp_is_enabled(&pmp);
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}
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int sbi_hart_pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
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unsigned long log2len)
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{
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pmp_t pmp;
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int rc;
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rc = sbi_pmp_encode(&pmp, prot, addr, log2len);
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if (rc)
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return rc;
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return hart_pmp_write(&pmp, n);
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}
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int sbi_hart_pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
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unsigned long *log2len)
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{
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pmp_t pmp;
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int rc;
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rc = hart_pmp_read(&pmp, n);
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if (rc)
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return rc;
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return sbi_pmp_decode(&pmp, prot_out, addr_out, log2len);
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}
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@@ -12,9 +12,119 @@
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#include <sbi/sbi_hfence.h>
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#include <sbi/sbi_math.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_pmp.h>
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#include <sbi/sbi_tlb.h>
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#include <sbi/riscv_asm.h>
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static int hart_pmp_read(pmp_t *pmp, unsigned int n)
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{
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int pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;
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unsigned long cfgmask;
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/* check parameters */
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if (n >= PMP_COUNT)
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return SBI_EINVAL;
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/* calculate PMP register and offset */
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#if __riscv_xlen == 32
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pmpcfg_csr = CSR_PMPCFG0 + (n >> 2);
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pmpcfg_shift = (n & 3) << 3;
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#elif __riscv_xlen == 64
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pmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;
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pmpcfg_shift = (n & 7) << 3;
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#else
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# error "Unexpected __riscv_xlen"
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#endif
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pmpaddr_csr = CSR_PMPADDR0 + n;
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cfgmask = (0xffUL << pmpcfg_shift);
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pmp->cfg = (csr_read_num(pmpcfg_csr) & cfgmask) >> pmpcfg_shift;
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pmp->addr = csr_read_num(pmpaddr_csr);
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return SBI_OK;
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}
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static int hart_pmp_write(pmp_t *pmp, unsigned int n)
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{
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int pmpcfg_csr, pmpcfg_shift, pmpaddr_csr;
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unsigned long cfgmask, pmpcfg;
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/* check parameters */
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if (n >= PMP_COUNT)
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return SBI_EINVAL;
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/* calculate PMP register and offset */
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#if __riscv_xlen == 32
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pmpcfg_csr = CSR_PMPCFG0 + (n >> 2);
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pmpcfg_shift = (n & 3) << 3;
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#elif __riscv_xlen == 64
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pmpcfg_csr = (CSR_PMPCFG0 + (n >> 2)) & ~1;
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pmpcfg_shift = (n & 7) << 3;
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#else
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# error "Unexpected __riscv_xlen"
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#endif
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pmpaddr_csr = CSR_PMPADDR0 + n;
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/* write csrs */
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csr_write_num(pmpaddr_csr, pmp->addr);
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cfgmask = ~(0xffUL << pmpcfg_shift);
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pmpcfg = (csr_read_num(pmpcfg_csr) & cfgmask);
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pmpcfg |= (((unsigned long)pmp->cfg << pmpcfg_shift) & ~cfgmask);
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csr_write_num(pmpcfg_csr, pmpcfg);
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return SBI_OK;
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}
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int sbi_hart_pmp_disable(unsigned int n)
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{
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pmp_t pmp;
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int rc;
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rc = hart_pmp_read(&pmp, n);
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if (rc)
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return rc;
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pmp.cfg = 0;
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return hart_pmp_write(&pmp, n);
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}
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bool sbi_hart_is_pmp_enabled(unsigned int n)
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{
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pmp_t pmp;
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if (hart_pmp_read(&pmp, n) != SBI_OK)
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return false;
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return sbi_pmp_is_enabled(&pmp);
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}
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int sbi_hart_pmp_set(unsigned int n, unsigned long prot, unsigned long addr,
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unsigned long log2len)
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{
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pmp_t pmp;
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int rc;
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rc = sbi_pmp_encode(&pmp, prot, addr, log2len);
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if (rc)
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return rc;
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return hart_pmp_write(&pmp, n);
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}
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int sbi_hart_pmp_get(unsigned int n, unsigned long *prot_out, unsigned long *addr_out,
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unsigned long *log2len)
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{
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pmp_t pmp;
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int rc;
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rc = hart_pmp_read(&pmp, n);
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if (rc)
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return rc;
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return sbi_pmp_decode(&pmp, prot_out, addr_out, log2len);
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}
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/*
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* Smepmp enforces access boundaries between M-mode and
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* S/U-mode. When it is enabled, the PMPs are programmed
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