mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-24 15:31:22 +01:00
platform: Setup serial console device in early_init()
The sbi_console_init() does not do any special initialization so setup serial console device in early_init() so that console prints work as early as possible. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-By: Himanshu Chauhan <hchauhan@ventanamicro.com>
This commit is contained in:
@@ -7,7 +7,6 @@
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_platform.h>
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@@ -67,8 +66,15 @@ static struct aclint_mtimer_data mtimer = {
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*/
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static int ariane_early_init(bool cold_boot)
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{
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/* For now nothing to do. */
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return 0;
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if (!cold_boot)
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return 0;
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return uart8250_init(ARIANE_UART_ADDR,
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ARIANE_UART_FREQ,
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ARIANE_UART_BAUDRATE,
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ARIANE_UART_REG_SHIFT,
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ARIANE_UART_REG_WIDTH,
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ARIANE_UART_REG_OFFSET);
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}
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/*
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@@ -87,19 +93,6 @@ static int ariane_final_init(bool cold_boot)
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return 0;
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}
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/*
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* Initialize the ariane console.
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*/
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static int ariane_console_init(void)
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{
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return uart8250_init(ARIANE_UART_ADDR,
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ARIANE_UART_FREQ,
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ARIANE_UART_BAUDRATE,
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ARIANE_UART_REG_SHIFT,
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ARIANE_UART_REG_WIDTH,
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ARIANE_UART_REG_OFFSET);
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}
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static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
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{
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int ret;
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@@ -175,7 +168,6 @@ static int ariane_timer_init(bool cold_boot)
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const struct sbi_platform_operations platform_ops = {
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.early_init = ariane_early_init,
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.final_init = ariane_final_init,
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.console_init = ariane_console_init,
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.irqchip_init = ariane_irqchip_init,
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.ipi_init = ariane_ipi_init,
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.timer_init = ariane_timer_init,
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@@ -6,7 +6,6 @@
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_platform.h>
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@@ -103,7 +102,10 @@ static int openpiton_early_init(bool cold_boot)
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ACLINT_DEFAULT_MTIMECMP_OFFSET;
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}
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return 0;
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return uart8250_init(uart.addr, uart.freq, uart.baud,
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OPENPITON_DEFAULT_UART_REG_SHIFT,
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OPENPITON_DEFAULT_UART_REG_WIDTH,
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OPENPITON_DEFAULT_UART_REG_OFFSET);
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}
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/*
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@@ -122,19 +124,6 @@ static int openpiton_final_init(bool cold_boot)
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return 0;
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}
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/*
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* Initialize the openpiton console.
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*/
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static int openpiton_console_init(void)
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{
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return uart8250_init(uart.addr,
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uart.freq,
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uart.baud,
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OPENPITON_DEFAULT_UART_REG_SHIFT,
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OPENPITON_DEFAULT_UART_REG_WIDTH,
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OPENPITON_DEFAULT_UART_REG_OFFSET);
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}
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static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id)
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{
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int ret;
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@@ -210,7 +199,6 @@ static int openpiton_timer_init(bool cold_boot)
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const struct sbi_platform_operations platform_ops = {
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.early_init = openpiton_early_init,
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.final_init = openpiton_final_init,
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.console_init = openpiton_console_init,
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.irqchip_init = openpiton_irqchip_init,
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.ipi_init = openpiton_ipi_init,
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.timer_init = openpiton_timer_init,
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@@ -221,9 +221,19 @@ static int generic_nascent_init(void)
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static int generic_early_init(bool cold_boot)
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{
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if (cold_boot)
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int rc;
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if (cold_boot) {
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fdt_reset_init();
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if (semihosting_enabled())
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rc = semihosting_init();
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else
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rc = fdt_serial_init();
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if (rc)
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return rc;
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}
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if (!generic_plat || !generic_plat->early_init)
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return 0;
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@@ -378,14 +388,6 @@ static uint64_t generic_pmu_xlate_to_mhpmevent(uint32_t event_idx,
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return evt_val;
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}
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static int generic_console_init(void)
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{
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if (semihosting_enabled())
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return semihosting_init();
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else
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return fdt_serial_init();
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}
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const struct sbi_platform_operations platform_ops = {
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.cold_boot_allowed = generic_cold_boot_allowed,
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.nascent_init = generic_nascent_init,
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@@ -395,7 +397,6 @@ const struct sbi_platform_operations platform_ops = {
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.final_exit = generic_final_exit,
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.extensions_init = generic_extensions_init,
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.domains_init = generic_domains_init,
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.console_init = generic_console_init,
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.irqchip_init = fdt_irqchip_init,
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.irqchip_exit = fdt_irqchip_exit,
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.ipi_init = fdt_ipi_init,
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@@ -9,7 +9,6 @@
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_system.h>
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@@ -109,10 +108,13 @@ static struct sbi_system_reset_device k210_reset = {
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static int k210_early_init(bool cold_boot)
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{
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if (cold_boot)
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sbi_system_reset_add_device(&k210_reset);
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if (!cold_boot)
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return 0;
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return 0;
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sbi_system_reset_add_device(&k210_reset);
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return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
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K210_UART_BAUDRATE);
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}
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static int k210_final_init(bool cold_boot)
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@@ -130,12 +132,6 @@ static int k210_final_init(bool cold_boot)
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return 0;
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}
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static int k210_console_init(void)
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{
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return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
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K210_UART_BAUDRATE);
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}
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static int k210_irqchip_init(bool cold_boot)
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{
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int rc;
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@@ -181,8 +177,6 @@ const struct sbi_platform_operations platform_ops = {
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.final_init = k210_final_init,
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.console_init = k210_console_init,
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.irqchip_init = k210_irqchip_init,
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.ipi_init = k210_ipi_init,
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@@ -11,7 +11,6 @@
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_io.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_system.h>
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@@ -150,8 +149,10 @@ static int ux600_early_init(bool cold_boot)
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{
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u32 regval;
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if (cold_boot)
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sbi_system_reset_add_device(&ux600_reset);
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if (!cold_boot)
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return 0;
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sbi_system_reset_add_device(&ux600_reset);
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/* Measure CPU Frequency using Timer */
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ux600_clk_freq = ux600_get_clk_freq();
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@@ -163,7 +164,9 @@ static int ux600_early_init(bool cold_boot)
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regval = readl((void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_EN_OFS)) |
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UX600_GPIO_IOF_UART0_MASK;
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writel(regval, (void *)(UX600_GPIO_ADDR + UX600_GPIO_IOF_EN_OFS));
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return 0;
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return sifive_uart_init(UX600_DEBUG_UART, ux600_clk_freq,
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UX600_UART_BAUDRATE);
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}
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static void ux600_modify_dt(void *fdt)
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@@ -184,12 +187,6 @@ static int ux600_final_init(bool cold_boot)
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return 0;
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}
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static int ux600_console_init(void)
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{
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return sifive_uart_init(UX600_DEBUG_UART, ux600_clk_freq,
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UX600_UART_BAUDRATE);
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}
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static int ux600_irqchip_init(bool cold_boot)
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{
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int rc;
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@@ -234,7 +231,6 @@ static int ux600_timer_init(bool cold_boot)
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const struct sbi_platform_operations platform_ops = {
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.early_init = ux600_early_init,
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.final_init = ux600_final_init,
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.console_init = ux600_console_init,
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.irqchip_init = ux600_irqchip_init,
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.ipi_init = ux600_ipi_init,
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.timer_init = ux600_timer_init,
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@@ -64,7 +64,12 @@ static struct aclint_mtimer_data mtimer = {
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*/
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static int platform_early_init(bool cold_boot)
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{
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return 0;
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if (!cold_boot)
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return 0;
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/* Example if the generic UART8250 driver is used */
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return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
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PLATFORM_UART_BAUDRATE, 0, 1, 0);
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}
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/*
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@@ -75,16 +80,6 @@ static int platform_final_init(bool cold_boot)
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return 0;
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}
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/*
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* Initialize the platform console.
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*/
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static int platform_console_init(void)
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{
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/* Example if the generic UART8250 driver is used */
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return uart8250_init(PLATFORM_UART_ADDR, PLATFORM_UART_INPUT_FREQ,
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PLATFORM_UART_BAUDRATE, 0, 1, 0);
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}
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/*
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* Initialize the platform interrupt controller for current HART.
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*/
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@@ -143,7 +138,6 @@ static int platform_timer_init(bool cold_boot)
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const struct sbi_platform_operations platform_ops = {
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.early_init = platform_early_init,
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.final_init = platform_final_init,
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.console_init = platform_console_init,
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.irqchip_init = platform_irqchip_init,
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.ipi_init = platform_ipi_init,
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.timer_init = platform_timer_init
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