mirror of
https://github.com/riscv-software-src/opensbi.git
synced 2025-08-25 07:41:42 +01:00
lib: fix csr detect support
csr_read_allowed/csr_read_allowed requires trap.case to detect the results, but if no exception occurs, the value of trap.case will remain unchanged, which makes the detection results unreliable. Add code to initialize trap.case to 0. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
@@ -12,6 +12,7 @@
|
|||||||
|
|
||||||
#include <sbi/riscv_encoding.h>
|
#include <sbi/riscv_encoding.h>
|
||||||
#include <sbi/sbi_hart.h>
|
#include <sbi/sbi_hart.h>
|
||||||
|
#include <sbi/sbi_trap.h>
|
||||||
|
|
||||||
#define csr_read_allowed(csr_num, trap) \
|
#define csr_read_allowed(csr_num, trap) \
|
||||||
({ \
|
({ \
|
||||||
@@ -19,6 +20,7 @@
|
|||||||
register ulong ttmp asm("a4"); \
|
register ulong ttmp asm("a4"); \
|
||||||
register ulong mtvec = sbi_hart_expected_trap_addr(); \
|
register ulong mtvec = sbi_hart_expected_trap_addr(); \
|
||||||
register ulong ret = 0; \
|
register ulong ret = 0; \
|
||||||
|
((struct sbi_trap_info *)(trap))->cause = 0; \
|
||||||
asm volatile( \
|
asm volatile( \
|
||||||
"add %[ttmp], %[tinfo], zero\n" \
|
"add %[ttmp], %[tinfo], zero\n" \
|
||||||
"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n" \
|
"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n" \
|
||||||
@@ -36,6 +38,7 @@
|
|||||||
register ulong tinfo asm("a3") = (ulong)trap; \
|
register ulong tinfo asm("a3") = (ulong)trap; \
|
||||||
register ulong ttmp asm("a4"); \
|
register ulong ttmp asm("a4"); \
|
||||||
register ulong mtvec = sbi_hart_expected_trap_addr(); \
|
register ulong mtvec = sbi_hart_expected_trap_addr(); \
|
||||||
|
((struct sbi_trap_info *)(trap))->cause = 0; \
|
||||||
asm volatile( \
|
asm volatile( \
|
||||||
"add %[ttmp], %[tinfo], zero\n" \
|
"add %[ttmp], %[tinfo], zero\n" \
|
||||||
"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n" \
|
"csrrw %[mtvec], " STR(CSR_MTVEC) ", %[mtvec]\n" \
|
||||||
|
@@ -406,7 +406,6 @@ __mhpm_skip:
|
|||||||
#undef __check_csr
|
#undef __check_csr
|
||||||
|
|
||||||
/* Detect if hart supports SCOUNTEREN feature */
|
/* Detect if hart supports SCOUNTEREN feature */
|
||||||
trap.cause = 0;
|
|
||||||
val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
|
val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
|
||||||
if (!trap.cause) {
|
if (!trap.cause) {
|
||||||
csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap, val);
|
csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap, val);
|
||||||
@@ -415,7 +414,6 @@ __mhpm_skip:
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Detect if hart supports MCOUNTEREN feature */
|
/* Detect if hart supports MCOUNTEREN feature */
|
||||||
trap.cause = 0;
|
|
||||||
val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
|
val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
|
||||||
if (!trap.cause) {
|
if (!trap.cause) {
|
||||||
csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap, val);
|
csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap, val);
|
||||||
@@ -424,7 +422,6 @@ __mhpm_skip:
|
|||||||
}
|
}
|
||||||
|
|
||||||
/* Detect if hart supports time CSR */
|
/* Detect if hart supports time CSR */
|
||||||
trap.cause = 0;
|
|
||||||
csr_read_allowed(CSR_TIME, (unsigned long)&trap);
|
csr_read_allowed(CSR_TIME, (unsigned long)&trap);
|
||||||
if (!trap.cause)
|
if (!trap.cause)
|
||||||
hfeatures->features |= SBI_HART_HAS_TIME;
|
hfeatures->features |= SBI_HART_HAS_TIME;
|
||||||
|
Reference in New Issue
Block a user