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include: sbi: Fix illegal shift in sbi_domain.h

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In sbi_domain.h, when checking if a memory region is a subset of
another, an undefined behavior arithmetic operation was caught
when sanitizing with UBSan (shift exponent __riscv_xlen).

This patch adds a check to handle the case where the region order
is __riscv_xlen, avoiding the illegal shift and ensuring the operation
remains defined.

Please let me know if there’s any other most suitable solution for
this bug.

Signed-off-by: Marcos Oduardo <marcos.oduardo@gmail.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260222235219.276432-1-marcos.oduardo@gmail.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Marcos Oduardo
2026-02-23 00:51:50 +01:00
committed by Anup Patel
parent 8d1c21b387
commit 3baca10015
1 changed files with 4 additions and 2 deletions
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6
include/sbi/sbi_domain.h
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@@ -170,9 +170,11 @@ static inline bool sbi_domain_memregion_is_subset(
const struct sbi_domain_memregion *regB) const struct sbi_domain_memregion *regB)
{ {
ulong regA_start = regA->base; ulong regA_start = regA->base;
ulong regA_end = regA->base + (BIT(regA->order) - 1); ulong regA_mask = (regA->order >= __riscv_xlen) ? ~0UL : (BIT(regA->order) - 1);
ulong regA_end = regA_start + regA_mask;
ulong regB_start = regB->base; ulong regB_start = regB->base;
ulong regB_end = regB->base + (BIT(regB->order) - 1); ulong regB_mask = (regB->order >= __riscv_xlen) ? ~0UL : (BIT(regB->order) - 1);
ulong regB_end = regB_start + regB_mask;
if ((regB_start <= regA_start) && if ((regB_start <= regA_start) &&
(regA_start < regB_end) && (regA_start < regB_end) &&