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platform: generic: Add Sophgo sg2042 platform support

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Add Sophgo sg2042 soc support

Signed-off-by: Inochi Amaoto <inochiama@outlook.com>
Reviewed-by: Guo Ren <guoren@kernel.org>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Inochi Amaoto
2023-10-20 07:57:18 +08:00
committed by Anup Patel
parent 3b03cdd60c
commit 2bfdb9e5c2
4 changed files with 79 additions and 0 deletions
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6
platform/generic/Kconfig
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@@ -49,6 +49,12 @@ config PLATFORM_SIFIVE_FU740
depends on FDT_RESET && FDT_I2C depends on FDT_RESET && FDT_I2C
default n default n
config PLATFORM_SOPHGO_SG2042
bool "Sophgo sg2042 support"
select THEAD_C9XX_ERRATA
select THEAD_C9XX_PMU
default n
config PLATFORM_STARFIVE_JH7110 config PLATFORM_STARFIVE_JH7110
bool "StarFive JH7110 support" bool "StarFive JH7110 support"
default n default n

1
platform/generic/configs/defconfig
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@@ -3,6 +3,7 @@ CONFIG_PLATFORM_ANDES_AE350=y
CONFIG_PLATFORM_RENESAS_RZFIVE=y CONFIG_PLATFORM_RENESAS_RZFIVE=y
CONFIG_PLATFORM_SIFIVE_FU540=y CONFIG_PLATFORM_SIFIVE_FU540=y
CONFIG_PLATFORM_SIFIVE_FU740=y CONFIG_PLATFORM_SIFIVE_FU740=y
CONFIG_PLATFORM_SOPHGO_SG2042=y
CONFIG_PLATFORM_STARFIVE_JH7110=y CONFIG_PLATFORM_STARFIVE_JH7110=y
CONFIG_PLATFORM_THEAD=y CONFIG_PLATFORM_THEAD=y
CONFIG_FDT_GPIO=y CONFIG_FDT_GPIO=y

9
platform/generic/sophgo/objects.mk Normal file
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@@ -0,0 +1,9 @@
#
# SPDX-License-Identifier: BSD-2-Clause
#
# Copyright (C) 2023 Inochi Amaoto <inochiama@outlook.com>
# Copyright (C) 2023 Alibaba Group Holding Limited.
#
carray-platform_override_modules-$(CONFIG_PLATFORM_SOPHGO_SG2042) += sophgo_sg2042
platform-objs-$(CONFIG_PLATFORM_SOPHGO_SG2042) += sophgo/sg2042.o

63
platform/generic/sophgo/sg2042.c Normal file
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@@ -0,0 +1,63 @@
/*
* SPDX-License-Identifier: BSD-2-Clause
*
* Authors:
* Inochi Amaoto <inochiama@outlook.com>
*
*/
#include <platform_override.h>
#include <thead/c9xx_errata.h>
#include <thead/c9xx_pmu.h>
#include <sbi/sbi_const.h>
#include <sbi/sbi_domain.h>
#include <sbi/sbi_platform.h>
#include <sbi/sbi_scratch.h>
#include <sbi/sbi_string.h>
#include <sbi_utils/fdt/fdt_helper.h>
#include <sbi_utils/timer/aclint_mtimer.h>
#define SOPHGO_SG2042_TIMER_BASE 0x70ac000000ULL
#define SOPHGO_SG2042_TIMER_SIZE 0x10000UL
#define SOPHGO_SG2042_TIMER_NUM 16
static int sophgo_sg2042_early_init(bool cold_boot,
const struct fdt_match *match)
{
thead_register_tlb_flush_trap_handler();
/*
* Sophgo sg2042 soc use separate 16 timers while initiating,
* merge them as a single domain to avoid wasting.
*/
if (cold_boot)
return sbi_domain_root_add_memrange(
(ulong)SOPHGO_SG2042_TIMER_BASE,
SOPHGO_SG2042_TIMER_SIZE *
SOPHGO_SG2042_TIMER_NUM,
MTIMER_REGION_ALIGN,
(SBI_DOMAIN_MEMREGION_MMIO |
SBI_DOMAIN_MEMREGION_M_READABLE |
SBI_DOMAIN_MEMREGION_M_WRITABLE));
return 0;
}
static int sophgo_sg2042_extensions_init(const struct fdt_match *match,
struct sbi_hart_features *hfeatures)
{
thead_c9xx_register_pmu_device();
return 0;
}
static const struct fdt_match sophgo_sg2042_match[] = {
{ .compatible = "sophgo,sg2042" },
{ },
};
const struct platform_override sophgo_sg2042 = {
.match_table = sophgo_sg2042_match,
.early_init = sophgo_sg2042_early_init,
.extensions_init = sophgo_sg2042_extensions_init,
};