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2bfdb9e5c2
Add Sophgo sg2042 soc support Signed-off-by: Inochi Amaoto <inochiama@outlook.com> Reviewed-by: Guo Ren <guoren@kernel.org> Reviewed-by: Anup Patel <anup@brainfault.org>
64 lines
1.5 KiB
C
64 lines
1.5 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Authors:
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* Inochi Amaoto <inochiama@outlook.com>
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*
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*/
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#include <platform_override.h>
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#include <thead/c9xx_errata.h>
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#include <thead/c9xx_pmu.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_scratch.h>
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#include <sbi/sbi_string.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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#define SOPHGO_SG2042_TIMER_BASE 0x70ac000000ULL
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#define SOPHGO_SG2042_TIMER_SIZE 0x10000UL
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#define SOPHGO_SG2042_TIMER_NUM 16
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static int sophgo_sg2042_early_init(bool cold_boot,
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const struct fdt_match *match)
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{
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thead_register_tlb_flush_trap_handler();
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/*
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* Sophgo sg2042 soc use separate 16 timers while initiating,
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* merge them as a single domain to avoid wasting.
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*/
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if (cold_boot)
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return sbi_domain_root_add_memrange(
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(ulong)SOPHGO_SG2042_TIMER_BASE,
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SOPHGO_SG2042_TIMER_SIZE *
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SOPHGO_SG2042_TIMER_NUM,
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MTIMER_REGION_ALIGN,
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(SBI_DOMAIN_MEMREGION_MMIO |
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SBI_DOMAIN_MEMREGION_M_READABLE |
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SBI_DOMAIN_MEMREGION_M_WRITABLE));
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return 0;
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}
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static int sophgo_sg2042_extensions_init(const struct fdt_match *match,
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struct sbi_hart_features *hfeatures)
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{
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thead_c9xx_register_pmu_device();
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return 0;
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}
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static const struct fdt_match sophgo_sg2042_match[] = {
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{ .compatible = "sophgo,sg2042" },
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{ },
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};
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const struct platform_override sophgo_sg2042 = {
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.match_table = sophgo_sg2042_match,
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.early_init = sophgo_sg2042_early_init,
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.extensions_init = sophgo_sg2042_extensions_init,
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};
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