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include: sbi: Add TINFO debug trigger CSR
Add the missing TINFO debug trigger CSR. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
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Anup Patel

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20ca19ab03
@@ -686,6 +686,7 @@
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#define CSR_TDATA1 0x7a1
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#define CSR_TDATA1 0x7a1
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#define CSR_TDATA2 0x7a2
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#define CSR_TDATA2 0x7a2
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#define CSR_TDATA3 0x7a3
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#define CSR_TDATA3 0x7a3
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#define CSR_TINFO 0x7a4
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/* Debug Mode Registers */
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/* Debug Mode Registers */
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#define CSR_DCSR 0x7b0
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#define CSR_DCSR 0x7b0
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