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lib: sbi: Flush TLBs upon FWFT ADUE change

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A clarification has been added to the RISC-V privileged specification
regarding synchronization requirements when xenvcfg.ADUE changes.
(Refer, the following commit in the RISC-V Privileged ISA spec
https://github.com/riscv/riscv-isa-manual/commit/4e540263db8ae3a27d132a1752cc0fad222facd8)

As-per these requirements, the SBI FWFT ADUE implementation must
flush TLBs upon changes in ADUE state on a hart.

Signed-off-by: Andrew Waterman <andrew@sifive.com>
Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Link: https://lore.kernel.org/r/20251127112121.334023-3-apatel@ventanamicro.com
Signed-off-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Andrew Waterman
2025-11-27 16:51:21 +05:30
committed by Anup Patel
parent 843e916dca
commit 111738090c
1 changed files with 12 additions and 1 deletions
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lib/sbi/sbi_fwft.c
+12 -1
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@@ -13,8 +13,10 @@
#include <sbi/sbi_error.h>
#include <sbi/sbi_hart.h>
#include <sbi/sbi_heap.h>
#include <sbi/sbi_hfence.h>
#include <sbi/sbi_scratch.h>
#include <sbi/sbi_string.h>
#include <sbi/sbi_tlb.h>
#include <sbi/sbi_types.h>
#include <sbi/riscv_asm.h>
@@ -167,7 +169,16 @@ static int fwft_adue_supported(struct fwft_config *conf)
static int fwft_set_adue(struct fwft_config *conf, unsigned long value)
{
return fwft_menvcfg_set_bit(value, ENVCFG_ADUE_SHIFT);
int res = fwft_menvcfg_set_bit(value, ENVCFG_ADUE_SHIFT);
if (res == SBI_OK) {
__sbi_sfence_vma_all();
if (misa_extension('H'))
__sbi_hfence_gvma_all();
}
return res;
}
static int fwft_get_adue(struct fwft_config *conf, unsigned long *value)