Anup Patel 81e8950abe include: Remove redundant csr_read_n() and csr_write_n() ...

The patch removes redundant csr_read_n() and csr_write_n()
because same thing can be achieved by using __ASM_STR()
macro in csr_read() and csr_write() macros.

Signed-off-by: Anup Patel <anup.patel@wdc.com>

2019-01-02 09:57:12 +05:30

..

objects.mk

lib: Add misaligned load/store trap handling

2018-12-26 11:14:22 +05:30

riscv_asm.c

include: Remove redundant csr_read_n() and csr_write_n()

2019-01-02 09:57:12 +05:30

riscv_atomic.c

Initial commit.

2018-12-11 19:24:06 +05:30

riscv_locks.c

Initial commit.

2018-12-11 19:24:06 +05:30

sbi_console.c

console: protect output with a spinlock

2018-12-21 18:12:58 +09:00

sbi_ecall.c

lib: Move ECALL defines to sbi_ecall_interface.h

2018-12-27 09:29:29 +05:30

sbi_emulate_csr.c

lib: Don't emulate CSR read for misa and mhartid

2018-12-16 10:15:55 +05:30

sbi_hart.c

Introduce hart disabled parameter in platform.

2018-12-21 22:11:21 -08:00

sbi_illegal_insn.c

lib: Redirect illegal instruction trap to S-mode when not handled

2018-12-31 09:28:26 +05:30

sbi_init.c

lib: Simplify sbi_platform timer_init() hooks

2018-12-27 09:35:09 +05:30

sbi_ipi.c

lib: Simplify sbi_platform ipi_init() hooks

2018-12-27 09:35:09 +05:30

sbi_misaligned_ldst.c

lib: Add misaligned load/store trap handling

2018-12-26 11:14:22 +05:30

sbi_system.c

lib: Simplify sbi_platform early_init() and final_init() hooks

2018-12-27 09:35:09 +05:30

sbi_timer.c

lib: Simplify sbi_platform timer_init() hooks

2018-12-27 09:35:09 +05:30

sbi_trap.c

lib: Redirect illegal instruction trap to S-mode when not handled

2018-12-31 09:28:26 +05:30