forked from Mirrors/opensbi

Renesas RZ/Five RISC-V SoC has Instruction local memory and Data local memory (ILM & DLM) mapped between region 0x30000 - 0x4FFFF. When a virtual address falls within this range, the MMU doesn't trigger a page fault; it assumes the virtual address is a physical address which can cause undesired behaviours for statically linked applications/libraries. To avoid this, add the ILM/DLM memory regions to the root domain region of the PMPU with permissions set to 0x0 for S/U modes so that any access to these regions gets blocked and for M-mode we grant full access (R/W/X). Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Anup Patel <anup@brainfault.org>
38 lines
1.2 KiB
C
38 lines
1.2 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2022 Renesas Electronics Corp.
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*
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*/
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#include <platform_override.h>
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#include <sbi/sbi_domain.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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int renesas_rzfive_early_init(bool cold_boot, const struct fdt_match *match)
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{
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/*
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* Renesas RZ/Five RISC-V SoC has Instruction local memory and
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* Data local memory (ILM & DLM) mapped between region 0x30000
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* to 0x4FFFF. When a virtual address falls within this range,
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* the MMU doesn't trigger a page fault; it assumes the virtual
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* address is a physical address which can cause undesired
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* behaviours for statically linked applications/libraries. To
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* avoid this, add the ILM/DLM memory regions to the root domain
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* region of the PMPU with permissions set to 0x0 for S/U modes
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* so that any access to these regions gets blocked and for M-mode
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* we grant full access.
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*/
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return sbi_domain_root_add_memrange(0x30000, 0x20000, 0x1000,
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SBI_DOMAIN_MEMREGION_M_RWX);
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}
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static const struct fdt_match renesas_rzfive_match[] = {
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{ .compatible = "renesas,r9a07g043f01" },
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{ /* sentinel */ }
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};
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const struct platform_override renesas_rzfive = {
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.match_table = renesas_rzfive_match,
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.early_init = renesas_rzfive_early_init,
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};
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