forked from Mirrors/opensbi
be9752a071
All existing users of this operation target the current hart, and it seems unlikely that a future user will need to clear the pending IPI status of a remote hart. Simplify the logic by changing .ipi_clear (and its wrapper sbi_ipi_raw_clear()) to always operate on the current hart. This incidentally fixes a bug introduced in commit78c667b6fc("lib: sbi: Prefer hartindex over hartid in IPI framework"), which changed the .ipi_clear parameter from a hartid to a hart index, but failed to update the warm_init functions to match. Fixes:78c667b6fc("lib: sbi: Prefer hartindex over hartid in IPI framework") Signed-off-by: Samuel Holland <samuel.holland@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org>
121 lines
2.8 KiB
C
121 lines
2.8 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_scratch.h>
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#include <sbi/sbi_timer.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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static unsigned long mswi_ptr_offset;
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#define mswi_get_hart_data_ptr(__scratch) \
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sbi_scratch_read_type((__scratch), void *, mswi_ptr_offset)
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#define mswi_set_hart_data_ptr(__scratch, __mswi) \
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sbi_scratch_write_type((__scratch), void *, mswi_ptr_offset, (__mswi))
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static void mswi_ipi_send(u32 hart_index)
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{
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u32 *msip;
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struct sbi_scratch *scratch;
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struct aclint_mswi_data *mswi;
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scratch = sbi_hartindex_to_scratch(hart_index);
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if (!scratch)
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return;
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mswi = mswi_get_hart_data_ptr(scratch);
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if (!mswi)
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return;
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/* Set ACLINT IPI */
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msip = (void *)mswi->addr;
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writel_relaxed(1, &msip[sbi_hartindex_to_hartid(hart_index) -
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mswi->first_hartid]);
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}
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static void mswi_ipi_clear(void)
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{
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u32 *msip;
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struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
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struct aclint_mswi_data *mswi;
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mswi = mswi_get_hart_data_ptr(scratch);
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if (!mswi)
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return;
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/* Clear ACLINT IPI */
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msip = (void *)mswi->addr;
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writel_relaxed(0, &msip[current_hartid() - mswi->first_hartid]);
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}
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static struct sbi_ipi_device aclint_mswi = {
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.name = "aclint-mswi",
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.ipi_send = mswi_ipi_send,
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.ipi_clear = mswi_ipi_clear
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};
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int aclint_mswi_warm_init(void)
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{
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/* Clear IPI for current HART */
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mswi_ipi_clear();
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return 0;
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}
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int aclint_mswi_cold_init(struct aclint_mswi_data *mswi)
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{
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u32 i;
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int rc;
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struct sbi_scratch *scratch;
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/* Sanity checks */
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if (!mswi || (mswi->addr & (ACLINT_MSWI_ALIGN - 1)) ||
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(mswi->size < (mswi->hart_count * sizeof(u32))) ||
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(!mswi->hart_count || mswi->hart_count > ACLINT_MSWI_MAX_HARTS))
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return SBI_EINVAL;
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/* Allocate scratch space pointer */
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if (!mswi_ptr_offset) {
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mswi_ptr_offset = sbi_scratch_alloc_type_offset(void *);
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if (!mswi_ptr_offset)
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return SBI_ENOMEM;
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}
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/* Update MSWI pointer in scratch space */
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for (i = 0; i < mswi->hart_count; i++) {
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scratch = sbi_hartid_to_scratch(mswi->first_hartid + i);
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/*
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* We don't need to fail if scratch pointer is not available
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* because we might be dealing with hartid of a HART disabled
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* in the device tree.
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*/
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if (!scratch)
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continue;
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mswi_set_hart_data_ptr(scratch, mswi);
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}
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/* Add MSWI regions to the root domain */
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rc = sbi_domain_root_add_memrange(mswi->addr, mswi->size, ACLINT_MSWI_ALIGN,
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SBI_DOMAIN_MEMREGION_MMIO |
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SBI_DOMAIN_MEMREGION_M_READABLE |
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SBI_DOMAIN_MEMREGION_M_WRITABLE);
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if (rc)
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return rc;
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sbi_ipi_set_device(&aclint_mswi);
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return 0;
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}
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