forked from Mirrors/opensbi
6019259dfb
The T-HEAD C90x PLIC has some special quirks, such as the S-mode delegation bit. OpenSBI currently handles this by checking the compatible string in the device tree. However, this matching is done in the order of the fdt_match array. So if a device tree contains both strings, for example: compatible = "thead,c900-plic", "riscv,plic0"; Then OpenSBI will match against the generic "riscv,plic0" string, since that appears first in the fdt_match array. This means it will fail to set the S-mode delegation bit, and Linux will fail to boot. In some cases, it is not possible to change the compatible string to just the T-HEAD PLIC, as older versions of Linux only recognize the RISC-V compatible string. This patch fixes that by moving the RISC-V string to the end, ensuring that the more specific options get matched first. Signed-off-by: Alex Studer <alex@studer.dev> Reviewed-by: Anup Patel <anup@brainfault.org>
118 lines
2.7 KiB
C
118 lines
2.7 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2020 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <libfdt.h>
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_heap.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_scratch.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/irqchip/fdt_irqchip.h>
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#include <sbi_utils/irqchip/plic.h>
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static int irqchip_plic_update_context_map(const void *fdt, int nodeoff,
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struct plic_data *pd)
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{
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const fdt32_t *val;
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u32 phandle, hwirq, hartid, hartindex;
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int i, err, count, cpu_offset, cpu_intc_offset;
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val = fdt_getprop(fdt, nodeoff, "interrupts-extended", &count);
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if (!val || count < sizeof(fdt32_t))
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return SBI_EINVAL;
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count = count / sizeof(fdt32_t);
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for (i = 0; i < count; i += 2) {
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phandle = fdt32_to_cpu(val[i]);
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hwirq = fdt32_to_cpu(val[i + 1]);
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cpu_intc_offset = fdt_node_offset_by_phandle(fdt, phandle);
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if (cpu_intc_offset < 0)
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continue;
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cpu_offset = fdt_parent_offset(fdt, cpu_intc_offset);
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if (cpu_offset < 0)
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continue;
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err = fdt_parse_hart_id(fdt, cpu_offset, &hartid);
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if (err)
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continue;
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hartindex = sbi_hartid_to_hartindex(hartid);
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if (hartindex == -1U)
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continue;
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switch (hwirq) {
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case IRQ_M_EXT:
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pd->context_map[hartindex][PLIC_M_CONTEXT] = i / 2;
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break;
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case IRQ_S_EXT:
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pd->context_map[hartindex][PLIC_S_CONTEXT] = i / 2;
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break;
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}
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}
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return 0;
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}
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static int irqchip_plic_cold_init(const void *fdt, int nodeoff,
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const struct fdt_match *match)
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{
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struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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int rc;
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struct plic_data *pd;
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pd = sbi_zalloc(PLIC_DATA_SIZE(plat->hart_count));
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if (!pd)
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return SBI_ENOMEM;
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rc = fdt_parse_plic_node(fdt, nodeoff, pd);
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if (rc)
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goto fail_free_data;
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pd->flags = (unsigned long)match->data;
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rc = irqchip_plic_update_context_map(fdt, nodeoff, pd);
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if (rc)
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goto fail_free_data;
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rc = plic_cold_irqchip_init(pd);
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if (rc)
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goto fail_free_data;
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return 0;
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fail_free_data:
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sbi_free(pd);
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return rc;
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}
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static const struct fdt_match irqchip_plic_match[] = {
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{ .compatible = "andestech,nceplic100" },
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{ .compatible = "sifive,plic-1.0.0" },
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{ .compatible = "thead,c900-plic",
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.data = (void *)(PLIC_FLAG_THEAD_DELEGATION | PLIC_FLAG_ENABLE_PM) },
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/*
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* We keep the generic RISC-V PLIC at the end.
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* This ensures we match against more specific options first.
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* (This is important if the PLIC has quirks, like the T-HEAD PLIC.)
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*/
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{ .compatible = "riscv,plic0" },
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{ /* sentinel */ }
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};
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const struct fdt_driver fdt_irqchip_plic = {
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.match_table = irqchip_plic_match,
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.init = irqchip_plic_cold_init,
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};
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