forked from Mirrors/opensbi
88398696c8
Simplify atomic-related bit operations through __atomic intrinsics. Signed-off-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
134 lines
3.1 KiB
C
134 lines
3.1 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/sbi_bitops.h>
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_barrier.h>
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#ifndef __riscv_atomic
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#error "opensbi strongly relies on the A extension of RISC-V"
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#endif
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long atomic_read(atomic_t *atom)
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{
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long ret = atom->counter;
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rmb();
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return ret;
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}
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void atomic_write(atomic_t *atom, long value)
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{
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atom->counter = value;
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wmb();
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}
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long atomic_add_return(atomic_t *atom, long value)
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{
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long ret;
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#if __SIZEOF_LONG__ == 4
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__asm__ __volatile__(" amoadd.w.aqrl %1, %2, %0"
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: "+A"(atom->counter), "=r"(ret)
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: "r"(value)
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: "memory");
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#elif __SIZEOF_LONG__ == 8
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__asm__ __volatile__(" amoadd.d.aqrl %1, %2, %0"
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: "+A"(atom->counter), "=r"(ret)
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: "r"(value)
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: "memory");
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#endif
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return ret + value;
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}
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long atomic_sub_return(atomic_t *atom, long value)
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{
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return atomic_add_return(atom, -value);
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}
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#define __axchg(ptr, new, size) \
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({ \
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__typeof__(ptr) __ptr = (ptr); \
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__typeof__(new) __new = (new); \
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__typeof__(*(ptr)) __ret; \
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switch (size) { \
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case 4: \
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__asm__ __volatile__ ( \
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" amoswap.w.aqrl %0, %2, %1\n" \
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: "=r" (__ret), "+A" (*__ptr) \
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: "r" (__new) \
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: "memory"); \
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break; \
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case 8: \
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__asm__ __volatile__ ( \
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" amoswap.d.aqrl %0, %2, %1\n" \
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: "=r" (__ret), "+A" (*__ptr) \
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: "r" (__new) \
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: "memory"); \
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break; \
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default: \
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break; \
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} \
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__ret; \
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})
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#define axchg(ptr, x) \
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({ \
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__typeof__(*(ptr)) _x_ = (x); \
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(__typeof__(*(ptr))) __axchg((ptr), _x_, sizeof(*(ptr))); \
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})
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long atomic_cmpxchg(atomic_t *atom, long oldval, long newval)
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{
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return __sync_val_compare_and_swap(&atom->counter, oldval, newval);
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}
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long atomic_xchg(atomic_t *atom, long newval)
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{
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/* Atomically set new value and return old value. */
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return axchg(&atom->counter, newval);
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}
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unsigned int atomic_raw_xchg_uint(volatile unsigned int *ptr,
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unsigned int newval)
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{
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/* Atomically set new value and return old value. */
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return axchg(ptr, newval);
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}
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unsigned long atomic_raw_xchg_ulong(volatile unsigned long *ptr,
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unsigned long newval)
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{
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/* Atomically set new value and return old value. */
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return axchg(ptr, newval);
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}
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int atomic_raw_set_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long res, mask = BIT_MASK(nr);
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res = __atomic_fetch_or(&addr[BIT_WORD(nr)], mask, __ATOMIC_RELAXED);
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return res & mask ? 1 : 0;
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}
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int atomic_raw_clear_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long res, mask = BIT_MASK(nr);
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res = __atomic_fetch_and(&addr[BIT_WORD(nr)], ~mask, __ATOMIC_RELAXED);
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return res & mask ? 1 : 0;
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}
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int atomic_set_bit(int nr, atomic_t *atom)
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{
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return atomic_raw_set_bit(nr, (unsigned long *)&atom->counter);
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}
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int atomic_clear_bit(int nr, atomic_t *atom)
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{
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return atomic_raw_clear_bit(nr, (unsigned long *)&atom->counter);
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}
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