forked from Mirrors/opensbi
1de66d170e
This patch optimize unpriv load/store implementation by having dedicated unpriv trap handler (just like KVM RISC-V). As a result of this optimization: 1. We have reduced roughly 13+ instruction in all unpriv load/store functions. The reduced instruction also include two function calls. 2. Per-HART trap info pointer in scratch space is now redundant hence removed. 3. The sbi_trap_handler() is now much cleaner because we don't have to handle unpriv load/store traps. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
38 lines
939 B
C
38 lines
939 B
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#ifndef __SBI_HART_H__
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#define __SBI_HART_H__
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#include <sbi/sbi_types.h>
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struct sbi_scratch;
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int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot);
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extern void (*sbi_hart_unpriv_trap)(void);
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static inline ulong sbi_hart_unpriv_trap_addr(void)
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{
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return (ulong)sbi_hart_unpriv_trap;
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}
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void sbi_hart_delegation_dump(struct sbi_scratch *scratch);
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void sbi_hart_pmp_dump(struct sbi_scratch *scratch);
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int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long daddr,
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unsigned long attr);
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void __attribute__((noreturn)) sbi_hart_hang(void);
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void __attribute__((noreturn))
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sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
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unsigned long next_addr, unsigned long next_mode,
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bool next_virt);
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#endif
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