Nick Hu 84d15f4f52 lib: sbi_hsm: Use csr_set to restore the MIP ...

If we use the csr_write to restore the MIP, we may clear the SEIP.
In generic behavior of QEMU, if the pending bits of PLIC are set and we
clear the SEIP, the QEMU may not set it back immediately. It may cause
the interrupts won't be handled anymore until the new interrupts arrived
and QEMU set the bits back.

Signed-off-by: Nick Hu <nick.hu@sifive.com>
Signed-off-by: Jim Shu <jim.shu@sifive.com>
Reviewed-by: Anup Patel <anup@brainfault.org>

2023-02-08 10:39:21 +05:30

..

sbi

lib: sbi_hsm: Use csr_set to restore the MIP

2023-02-08 10:39:21 +05:30

utils

lib: utils: Add fdt_add_cpu_idle_states() helper function

2023-01-24 17:30:21 +05:30