forked from Mirrors/opensbi
8234fc1bdf
Add ATCWDT200 as reset device of AE350 platform, this driver requires
SMU to program the reset vector registers before triggering WDT software
restart signal.
dts example:
smu@f0100000 {
compatible = "andestech,atcsmu";
reg = <0x00000000 0xf0100000 0x00000000 0x00001000>;
};
wdt: wdt@f0500000 {
compatible = "andestech,atcwdt200";
reg = <0x00000000 0xf0500000 0x00000000 0x00001000>;
interrupts = <3 4>;
interrupt-parent = <&plic0>;
clock-frequency = <15000000>;
};
Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
157 lines
3.6 KiB
C
157 lines
3.6 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Andes Technology Corporation
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*
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* Authors:
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* Zong Li <zong@andestech.com>
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* Nylon Chen <nylon7@andestech.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_trap.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#include <sbi_utils/fdt/fdt_fixup.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/reset/fdt_reset.h>
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#include <sbi_utils/serial/fdt_serial.h>
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#include <sbi_utils/timer/fdt_timer.h>
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#include "platform.h"
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#include "plicsw.h"
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#include "cache.h"
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static struct plic_data plic = {
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.addr = AE350_PLIC_ADDR,
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.num_src = AE350_PLIC_NUM_SOURCES,
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};
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/* Platform final initialization. */
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static int ae350_final_init(bool cold_boot)
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{
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void *fdt;
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if (!cold_boot)
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return 0;
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fdt_reset_init();
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fdt = fdt_get_address();
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fdt_fixups(fdt);
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return 0;
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}
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/* Initialize the platform interrupt controller for current HART. */
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static int ae350_irqchip_init(bool cold_boot)
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{
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u32 hartid = current_hartid();
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int ret;
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if (cold_boot) {
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ret = plic_cold_irqchip_init(&plic);
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if (ret)
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return ret;
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}
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return plic_warm_irqchip_init(&plic, 2 * hartid, 2 * hartid + 1);
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}
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static struct sbi_ipi_device plicsw_ipi = {
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.name = "ae350_plicsw",
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.ipi_send = plicsw_ipi_send,
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.ipi_clear = plicsw_ipi_clear
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};
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/* Initialize IPI for current HART. */
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static int ae350_ipi_init(bool cold_boot)
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{
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int ret;
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if (cold_boot) {
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ret = plicsw_cold_ipi_init(AE350_PLICSW_ADDR,
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AE350_HART_COUNT);
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if (ret)
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return ret;
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sbi_ipi_set_device(&plicsw_ipi);
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}
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return plicsw_warm_ipi_init();
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}
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/* Vendor-Specific SBI handler */
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static int ae350_vendor_ext_provider(long extid, long funcid,
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const struct sbi_trap_regs *regs, unsigned long *out_value,
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struct sbi_trap_info *out_trap)
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{
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int ret = 0;
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switch (funcid) {
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case SBI_EXT_ANDES_GET_MCACHE_CTL_STATUS:
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*out_value = csr_read(CSR_MCACHECTL);
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break;
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case SBI_EXT_ANDES_GET_MMISC_CTL_STATUS:
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*out_value = csr_read(CSR_MMISCCTL);
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break;
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case SBI_EXT_ANDES_SET_MCACHE_CTL:
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ret = mcall_set_mcache_ctl(regs->a0);
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break;
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case SBI_EXT_ANDES_SET_MMISC_CTL:
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ret = mcall_set_mmisc_ctl(regs->a0);
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break;
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case SBI_EXT_ANDES_ICACHE_OP:
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ret = mcall_icache_op(regs->a0);
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break;
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case SBI_EXT_ANDES_DCACHE_OP:
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ret = mcall_dcache_op(regs->a0);
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break;
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case SBI_EXT_ANDES_L1CACHE_I_PREFETCH:
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ret = mcall_l1_cache_i_prefetch_op(regs->a0);
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break;
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case SBI_EXT_ANDES_L1CACHE_D_PREFETCH:
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ret = mcall_l1_cache_d_prefetch_op(regs->a0);
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break;
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case SBI_EXT_ANDES_NON_BLOCKING_LOAD_STORE:
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ret = mcall_non_blocking_load_store(regs->a0);
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break;
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case SBI_EXT_ANDES_WRITE_AROUND:
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ret = mcall_write_around(regs->a0);
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break;
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default:
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sbi_printf("Unsupported vendor sbi call : %ld\n", funcid);
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asm volatile("ebreak");
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}
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return ret;
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}
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/* Platform descriptor. */
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const struct sbi_platform_operations platform_ops = {
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.final_init = ae350_final_init,
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.console_init = fdt_serial_init,
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.irqchip_init = ae350_irqchip_init,
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.ipi_init = ae350_ipi_init,
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.timer_init = fdt_timer_init,
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.vendor_ext_provider = ae350_vendor_ext_provider
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};
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const struct sbi_platform platform = {
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.opensbi_version = OPENSBI_VERSION,
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.platform_version =
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SBI_PLATFORM_VERSION(CONFIG_PLATFORM_ANDES_AE350_MAJOR_VER,
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CONFIG_PLATFORM_ANDES_AE350_MINOR_VER),
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.name = CONFIG_PLATFORM_ANDES_AE350_NAME,
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.features = SBI_PLATFORM_DEFAULT_FEATURES,
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.hart_count = AE350_HART_COUNT,
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.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
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.platform_ops_addr = (unsigned long)&platform_ops
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};
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