forked from Mirrors/opensbi

As-per latest RISC-V privilege spec up to 64 PMP entries are supported. Implementations may implement zero, 16, or 64 PMP CSRs. All PMP CSR fields are WARL and may be hardwired to zero. This patch improves PMP CSR detection and progamming considering above facts. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
520 lines
13 KiB
C
520 lines
13 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_barrier.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/riscv_fp.h>
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#include <sbi/sbi_bitops.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_csr_detect.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_math.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_string.h>
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extern void __sbi_expected_trap(void);
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extern void __sbi_expected_trap_hext(void);
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void (*sbi_hart_expected_trap)(void) = &__sbi_expected_trap;
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struct hart_features {
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unsigned long features;
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unsigned int pmp_count;
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};
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static unsigned long hart_features_offset;
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static void mstatus_init(struct sbi_scratch *scratch, u32 hartid)
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{
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unsigned long mstatus_val = 0;
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/* Enable FPU */
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if (misa_extension('D') || misa_extension('F'))
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mstatus_val |= MSTATUS_FS;
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/* Enable Vector context */
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if (misa_extension('V'))
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mstatus_val |= MSTATUS_VS;
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csr_write(CSR_MSTATUS, mstatus_val);
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/* Enable user/supervisor use of perf counters */
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if (misa_extension('S') &&
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sbi_hart_has_feature(scratch, SBI_HART_HAS_SCOUNTEREN))
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csr_write(CSR_SCOUNTEREN, -1);
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if (sbi_hart_has_feature(scratch, SBI_HART_HAS_MCOUNTEREN))
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csr_write(CSR_MCOUNTEREN, -1);
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/* Disable all interrupts */
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csr_write(CSR_MIE, 0);
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/* Disable S-mode paging */
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if (misa_extension('S'))
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csr_write(CSR_SATP, 0);
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}
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static int fp_init(u32 hartid)
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{
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#ifdef __riscv_flen
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int i;
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#endif
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if (!misa_extension('D') && !misa_extension('F'))
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return 0;
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if (!(csr_read(CSR_MSTATUS) & MSTATUS_FS))
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return SBI_EINVAL;
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#ifdef __riscv_flen
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for (i = 0; i < 32; i++)
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init_fp_reg(i);
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csr_write(CSR_FCSR, 0);
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#endif
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return 0;
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}
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static int delegate_traps(struct sbi_scratch *scratch, u32 hartid)
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{
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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unsigned long interrupts, exceptions;
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if (!misa_extension('S'))
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/* No delegation possible as mideleg does not exist */
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return 0;
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/* Send M-mode interrupts and most exceptions to S-mode */
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interrupts = MIP_SSIP | MIP_STIP | MIP_SEIP;
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exceptions = (1U << CAUSE_MISALIGNED_FETCH) | (1U << CAUSE_BREAKPOINT) |
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(1U << CAUSE_USER_ECALL);
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if (sbi_platform_has_mfaults_delegation(plat))
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exceptions |= (1U << CAUSE_FETCH_PAGE_FAULT) |
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(1U << CAUSE_LOAD_PAGE_FAULT) |
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(1U << CAUSE_STORE_PAGE_FAULT);
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/*
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* If hypervisor extension available then we only handle hypervisor
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* calls (i.e. ecalls from HS-mode) in M-mode.
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*
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* The HS-mode will additionally handle supervisor calls (i.e. ecalls
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* from VS-mode), Guest page faults and Virtual interrupts.
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*/
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if (misa_extension('H')) {
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exceptions |= (1U << CAUSE_SUPERVISOR_ECALL);
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exceptions |= (1U << CAUSE_FETCH_GUEST_PAGE_FAULT);
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exceptions |= (1U << CAUSE_LOAD_GUEST_PAGE_FAULT);
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exceptions |= (1U << CAUSE_VIRTUAL_INST_FAULT);
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exceptions |= (1U << CAUSE_STORE_GUEST_PAGE_FAULT);
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}
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csr_write(CSR_MIDELEG, interrupts);
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csr_write(CSR_MEDELEG, exceptions);
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return 0;
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}
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void sbi_hart_delegation_dump(struct sbi_scratch *scratch)
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{
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if (!misa_extension('S'))
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/* No delegation possible as mideleg does not exist*/
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return;
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#if __riscv_xlen == 32
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sbi_printf("MIDELEG : 0x%08lx\n", csr_read(CSR_MIDELEG));
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sbi_printf("MEDELEG : 0x%08lx\n", csr_read(CSR_MEDELEG));
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#else
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sbi_printf("MIDELEG : 0x%016lx\n", csr_read(CSR_MIDELEG));
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sbi_printf("MEDELEG : 0x%016lx\n", csr_read(CSR_MEDELEG));
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#endif
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}
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unsigned int sbi_hart_pmp_count(struct sbi_scratch *scratch)
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{
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struct hart_features *hfeatures =
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sbi_scratch_offset_ptr(scratch, hart_features_offset);
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return hfeatures->pmp_count;
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}
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int sbi_hart_pmp_get(struct sbi_scratch *scratch, unsigned int n,
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unsigned long *prot_out, unsigned long *addr_out,
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unsigned long *size)
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{
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if (sbi_hart_pmp_count(scratch) <= n)
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return SBI_EINVAL;
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return pmp_get(n, prot_out, addr_out, size);
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}
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void sbi_hart_pmp_dump(struct sbi_scratch *scratch)
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{
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unsigned long prot, addr, size;
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unsigned int i, pmp_count;
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pmp_count = sbi_hart_pmp_count(scratch);
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for (i = 0; i < pmp_count; i++) {
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pmp_get(i, &prot, &addr, &size);
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if (!(prot & PMP_A))
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continue;
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#if __riscv_xlen == 32
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sbi_printf("PMP%d : 0x%08lx-0x%08lx (A",
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#else
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sbi_printf("PMP%d : 0x%016lx-0x%016lx (A",
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#endif
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i, addr, addr + size - 1);
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if (prot & PMP_L)
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sbi_printf(",L");
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if (prot & PMP_R)
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sbi_printf(",R");
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if (prot & PMP_W)
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sbi_printf(",W");
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if (prot & PMP_X)
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sbi_printf(",X");
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sbi_printf(")\n");
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}
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}
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int sbi_hart_pmp_check_addr(struct sbi_scratch *scratch, unsigned long addr,
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unsigned long attr)
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{
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unsigned long prot, size, tempaddr;
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unsigned int i, pmp_count;
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pmp_count = sbi_hart_pmp_count(scratch);
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for (i = 0; i < pmp_count; i++) {
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pmp_get(i, &prot, &tempaddr, &size);
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if (!(prot & PMP_A))
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continue;
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if (tempaddr <= addr && addr <= tempaddr + size)
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if (!(prot & attr))
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return SBI_EINVALID_ADDR;
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}
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return SBI_OK;
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}
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static int pmp_init(struct sbi_scratch *scratch, u32 hartid)
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{
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u32 i, pmp_idx = 0, pmp_count, count;
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unsigned long fw_start, fw_size_log2;
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ulong prot, addr, log2size;
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const struct sbi_platform *plat = sbi_platform_ptr(scratch);
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if (!sbi_hart_pmp_count(scratch))
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return 0;
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/* Firmware PMP region to protect OpenSBI firmware */
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fw_size_log2 = log2roundup(scratch->fw_size);
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fw_start = scratch->fw_start & ~((1UL << fw_size_log2) - 1UL);
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pmp_set(pmp_idx++, 0, fw_start, fw_size_log2);
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/* Platform specific PMP regions */
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count = sbi_platform_pmp_region_count(plat, hartid);
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pmp_count = sbi_hart_pmp_count(scratch);
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for (i = 0; i < count && pmp_idx < (pmp_count - 1); i++) {
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if (sbi_platform_pmp_region_info(plat, hartid, i, &prot, &addr,
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&log2size))
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continue;
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pmp_set(pmp_idx++, prot, addr, log2size);
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}
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/*
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* Default PMP region for allowing S-mode and U-mode access to
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* memory not covered by:
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* 1) Firmware PMP region
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* 2) Platform specific PMP regions
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*/
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pmp_set(pmp_idx++, PMP_R | PMP_W | PMP_X, 0, __riscv_xlen);
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return 0;
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}
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/**
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* Check whether a particular hart feature is available
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*
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* @param scratch pointer to the HART scratch space
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* @param feature the feature to check
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* @returns true (feature available) or false (feature not available)
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*/
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bool sbi_hart_has_feature(struct sbi_scratch *scratch, unsigned long feature)
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{
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struct hart_features *hfeatures =
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sbi_scratch_offset_ptr(scratch, hart_features_offset);
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if (hfeatures->features & feature)
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return true;
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else
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return false;
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}
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static unsigned long hart_get_features(struct sbi_scratch *scratch)
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{
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struct hart_features *hfeatures =
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sbi_scratch_offset_ptr(scratch, hart_features_offset);
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return hfeatures->features;
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}
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static inline char *sbi_hart_feature_id2string(unsigned long feature)
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{
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char *fstr = NULL;
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if (!feature)
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return NULL;
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switch (feature) {
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case SBI_HART_HAS_SCOUNTEREN:
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fstr = "scounteren";
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break;
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case SBI_HART_HAS_MCOUNTEREN:
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fstr = "mcounteren";
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break;
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case SBI_HART_HAS_TIME:
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fstr = "time";
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break;
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default:
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break;
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}
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return fstr;
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}
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/**
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* Get the hart features in string format
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*
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* @param scratch pointer to the HART scratch space
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* @param features_str pointer to a char array where the features string will be
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* updated
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* @param nfstr length of the features_str. The feature string will be truncated
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* if nfstr is not long enough.
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*/
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void sbi_hart_get_features_str(struct sbi_scratch *scratch,
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char *features_str, int nfstr)
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{
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unsigned long features, feat = 1UL;
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char *temp;
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int offset = 0;
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if (!features_str || nfstr <= 0)
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return;
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sbi_memset(features_str, 0, nfstr);
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features = hart_get_features(scratch);
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if (!features)
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goto done;
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do {
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if (features & feat) {
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temp = sbi_hart_feature_id2string(feat);
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if (temp) {
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sbi_snprintf(features_str + offset, nfstr,
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"%s,", temp);
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offset = offset + sbi_strlen(temp) + 1;
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}
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}
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feat = feat << 1;
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} while (feat <= SBI_HART_HAS_LAST_FEATURE);
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done:
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if (offset)
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features_str[offset - 1] = '\0';
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else
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sbi_strncpy(features_str, "none", nfstr);
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}
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static void hart_detect_features(struct sbi_scratch *scratch)
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{
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struct sbi_trap_info trap = {0};
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struct hart_features *hfeatures;
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unsigned long val;
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/* Reset hart features */
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hfeatures = sbi_scratch_offset_ptr(scratch, hart_features_offset);
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hfeatures->features = 0;
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hfeatures->pmp_count = 0;
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#define __check_csr(__csr, __rdonly, __wrval, __field, __skip) \
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val = csr_read_allowed(__csr, (ulong)&trap); \
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if (!trap.cause) { \
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if (__rdonly) { \
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(hfeatures->__field)++; \
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} else { \
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csr_write_allowed(__csr, (ulong)&trap, __wrval);\
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if (!trap.cause) { \
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if (csr_swap(__csr, val) == __wrval) \
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(hfeatures->__field)++; \
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else \
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goto __skip; \
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} else { \
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goto __skip; \
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} \
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} \
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} else { \
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goto __skip; \
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}
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#define __check_csr_2(__csr, __rdonly, __wrval, __field, __skip) \
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__check_csr(__csr + 0, __rdonly, __wrval, __field, __skip) \
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__check_csr(__csr + 1, __rdonly, __wrval, __field, __skip)
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#define __check_csr_4(__csr, __rdonly, __wrval, __field, __skip) \
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__check_csr_2(__csr + 0, __rdonly, __wrval, __field, __skip) \
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__check_csr_2(__csr + 2, __rdonly, __wrval, __field, __skip)
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#define __check_csr_8(__csr, __rdonly, __wrval, __field, __skip) \
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__check_csr_4(__csr + 0, __rdonly, __wrval, __field, __skip) \
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__check_csr_4(__csr + 4, __rdonly, __wrval, __field, __skip)
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#define __check_csr_16(__csr, __rdonly, __wrval, __field, __skip) \
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__check_csr_8(__csr + 0, __rdonly, __wrval, __field, __skip) \
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__check_csr_8(__csr + 8, __rdonly, __wrval, __field, __skip)
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#define __check_csr_32(__csr, __rdonly, __wrval, __field, __skip) \
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__check_csr_16(__csr + 0, __rdonly, __wrval, __field, __skip) \
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__check_csr_16(__csr + 16, __rdonly, __wrval, __field, __skip)
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#define __check_csr_64(__csr, __rdonly, __wrval, __field, __skip) \
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__check_csr_32(__csr + 0, __rdonly, __wrval, __field, __skip) \
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__check_csr_32(__csr + 32, __rdonly, __wrval, __field, __skip)
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/* Detect number of PMP regions */
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__check_csr_64(CSR_PMPADDR0, 0, PMP_ADDR_MASK, pmp_count, __pmp_skip);
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__pmp_skip:
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#undef __check_csr_64
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#undef __check_csr_32
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#undef __check_csr_16
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#undef __check_csr_8
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#undef __check_csr_4
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#undef __check_csr_2
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#undef __check_csr
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/* Detect if hart supports SCOUNTEREN feature */
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trap.cause = 0;
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val = csr_read_allowed(CSR_SCOUNTEREN, (unsigned long)&trap);
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if (!trap.cause) {
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csr_write_allowed(CSR_SCOUNTEREN, (unsigned long)&trap, val);
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if (!trap.cause)
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hfeatures->features |= SBI_HART_HAS_SCOUNTEREN;
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}
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/* Detect if hart supports MCOUNTEREN feature */
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trap.cause = 0;
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val = csr_read_allowed(CSR_MCOUNTEREN, (unsigned long)&trap);
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if (!trap.cause) {
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csr_write_allowed(CSR_MCOUNTEREN, (unsigned long)&trap, val);
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if (!trap.cause)
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hfeatures->features |= SBI_HART_HAS_MCOUNTEREN;
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}
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/* Detect if hart supports time CSR */
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trap.cause = 0;
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csr_read_allowed(CSR_TIME, (unsigned long)&trap);
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if (!trap.cause)
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hfeatures->features |= SBI_HART_HAS_TIME;
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}
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int sbi_hart_init(struct sbi_scratch *scratch, u32 hartid, bool cold_boot)
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{
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int rc;
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if (cold_boot) {
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if (misa_extension('H'))
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sbi_hart_expected_trap = &__sbi_expected_trap_hext;
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hart_features_offset = sbi_scratch_alloc_offset(
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sizeof(struct hart_features),
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"HART_FEATURES");
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if (!hart_features_offset)
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return SBI_ENOMEM;
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}
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hart_detect_features(scratch);
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mstatus_init(scratch, hartid);
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rc = fp_init(hartid);
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if (rc)
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return rc;
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rc = delegate_traps(scratch, hartid);
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if (rc)
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return rc;
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return pmp_init(scratch, hartid);
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}
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void __attribute__((noreturn)) sbi_hart_hang(void)
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{
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while (1)
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wfi();
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__builtin_unreachable();
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}
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void __attribute__((noreturn))
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sbi_hart_switch_mode(unsigned long arg0, unsigned long arg1,
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unsigned long next_addr, unsigned long next_mode,
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bool next_virt)
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{
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#if __riscv_xlen == 32
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unsigned long val, valH;
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#else
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unsigned long val;
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#endif
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switch (next_mode) {
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case PRV_M:
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break;
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case PRV_S:
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if (!misa_extension('S'))
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sbi_hart_hang();
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break;
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case PRV_U:
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if (!misa_extension('U'))
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sbi_hart_hang();
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break;
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default:
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sbi_hart_hang();
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}
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val = csr_read(CSR_MSTATUS);
|
|
val = INSERT_FIELD(val, MSTATUS_MPP, next_mode);
|
|
val = INSERT_FIELD(val, MSTATUS_MPIE, 0);
|
|
#if __riscv_xlen == 32
|
|
if (misa_extension('H')) {
|
|
valH = csr_read(CSR_MSTATUSH);
|
|
if (next_virt)
|
|
valH = INSERT_FIELD(valH, MSTATUSH_MPV, 1);
|
|
else
|
|
valH = INSERT_FIELD(valH, MSTATUSH_MPV, 0);
|
|
csr_write(CSR_MSTATUSH, valH);
|
|
}
|
|
#else
|
|
if (misa_extension('H')) {
|
|
if (next_virt)
|
|
val = INSERT_FIELD(val, MSTATUS_MPV, 1);
|
|
else
|
|
val = INSERT_FIELD(val, MSTATUS_MPV, 0);
|
|
}
|
|
#endif
|
|
csr_write(CSR_MSTATUS, val);
|
|
csr_write(CSR_MEPC, next_addr);
|
|
|
|
if (next_mode == PRV_S) {
|
|
csr_write(CSR_STVEC, next_addr);
|
|
csr_write(CSR_SSCRATCH, 0);
|
|
csr_write(CSR_SIE, 0);
|
|
csr_write(CSR_SATP, 0);
|
|
} else if (next_mode == PRV_U) {
|
|
csr_write(CSR_UTVEC, next_addr);
|
|
csr_write(CSR_USCRATCH, 0);
|
|
csr_write(CSR_UIE, 0);
|
|
}
|
|
|
|
register unsigned long a0 asm("a0") = arg0;
|
|
register unsigned long a1 asm("a1") = arg1;
|
|
__asm__ __volatile__("mret" : : "r"(a0), "r"(a1));
|
|
__builtin_unreachable();
|
|
}
|