forked from Mirrors/opensbi
73d6ef3b29
The "target_hart" and "hart_count" parameters of PLIC cold and warm init functions are only used for sanity checks and not required in PLIC initialization. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
134 lines
2.9 KiB
C
134 lines
2.9 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Damien Le Moal <damien.lemoal@wdc.com>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/sbi_console.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_platform.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/serial/sifive-uart.h>
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#include <sbi_utils/sys/clint.h>
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#include "platform.h"
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static u32 k210_get_clk_freq(void)
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{
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u32 clksel0, pll0;
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u64 pll0_freq, clkr0, clkf0, clkod0, div;
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/*
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* If the clock selector is not set, use the base frequency.
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* Otherwise, use PLL0 frequency with a frequency divisor.
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*/
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clksel0 = k210_read_sysreg(K210_CLKSEL0);
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if (!(clksel0 & 0x1))
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return K210_CLK0_FREQ;
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/*
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* Get PLL0 frequency:
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* freq = base frequency * clkf0 / (clkr0 * clkod0)
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*/
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pll0 = k210_read_sysreg(K210_PLL0);
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clkr0 = 1 + (pll0 & 0x0000000f);
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clkf0 = 1 + ((pll0 & 0x000003f0) >> 4);
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clkod0 = 1 + ((pll0 & 0x00003c00) >> 10);
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pll0_freq = clkf0 * K210_CLK0_FREQ / (clkr0 * clkod0);
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/* Get the frequency divisor from the clock selector */
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div = 2ULL << ((clksel0 & 0x00000006) >> 1);
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return pll0_freq / div;
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}
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static int k210_console_init(void)
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{
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return sifive_uart_init(K210_UART_BASE_ADDR, k210_get_clk_freq(),
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K210_UART_BAUDRATE);
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}
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static int k210_irqchip_init(bool cold_boot)
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{
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int rc;
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u32 hartid = current_hartid();
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if (cold_boot) {
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rc = plic_cold_irqchip_init(K210_PLIC_BASE_ADDR,
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K210_PLIC_NUM_SOURCES);
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if (rc)
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return rc;
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}
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return plic_warm_irqchip_init(hartid * 2, hartid * 2 + 1);
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}
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static int k210_ipi_init(bool cold_boot)
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{
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int rc;
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if (cold_boot) {
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rc = clint_cold_ipi_init(K210_CLINT_BASE_ADDR,
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K210_HART_COUNT);
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if (rc)
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return rc;
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}
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return clint_warm_ipi_init();
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}
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static int k210_timer_init(bool cold_boot)
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{
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int rc;
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if (cold_boot) {
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rc = clint_cold_timer_init(K210_CLINT_BASE_ADDR,
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K210_HART_COUNT, TRUE);
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if (rc)
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return rc;
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}
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return clint_warm_timer_init();
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}
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static int k210_system_reset(u32 type)
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{
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/* For now nothing to do. */
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sbi_printf("System reset\n");
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return 0;
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}
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const struct sbi_platform_operations platform_ops = {
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.console_init = k210_console_init,
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.console_putc = sifive_uart_putc,
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.console_getc = sifive_uart_getc,
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.irqchip_init = k210_irqchip_init,
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.ipi_init = k210_ipi_init,
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.ipi_send = clint_ipi_send,
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.ipi_clear = clint_ipi_clear,
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.timer_init = k210_timer_init,
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.timer_value = clint_timer_value,
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.timer_event_stop = clint_timer_event_stop,
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.timer_event_start = clint_timer_event_start,
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.system_reset = k210_system_reset
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};
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const struct sbi_platform platform = {
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.opensbi_version = OPENSBI_VERSION,
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.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
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.name = "Kendryte K210",
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.features = SBI_PLATFORM_HAS_TIMER_VALUE,
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.hart_count = K210_HART_COUNT,
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.hart_stack_size = SBI_PLATFORM_DEFAULT_HART_STACK_SIZE,
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.platform_ops_addr = (unsigned long)&platform_ops
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};
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