Anup Patel c6530012d4 lib: utils: Remove CSRs that set/clear an IMSIC interrupt file bits ...

Based on architecture review committee feedback, the [m|s|vs]seteienum,
[m|s|vs]clreienum, [m|s|vs]seteipnum, and [m|s|vs]clreipnum CSRs are
removed in the latest AIA draft v0.3.0 specification.
(Refer, https://github.com/riscv/riscv-aia/releases/tag/0.3.0-draft.31)

These CSRs were mostly for software convenience and software can always
use [m|s|vs]iselect and [m|s|vs]ireg CSRs to update the IMSIC interrupt
file bits.

We update the IMSIC programming as-per above to match the latest AIA
draft specification.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Reviewed-by: Atish Patra <atishp@rivosinc.com>

2022-06-21 08:44:45 +05:30

..

sbi

lib: utils: Remove CSRs that set/clear an IMSIC interrupt file bits

2022-06-21 08:44:45 +05:30

sbi_utils

lib: utils/irqchip: Add wrapper for T-HEAD PLIC delegation

2022-06-13 11:54:06 +05:30