forked from Mirrors/opensbi
		
	This commit provides basic support for the Renesas RZ/Five (R9A07G043F) SoC. The RZ/Five microprocessor includes a single RISC-V CPU Core (Andes AX45MP) 1.0 GHz, 16-bit DDR3L/DDR4 interface. Supported interfaces include: - Gigabit Ethernet 2ch - CAN interface (CAN-FD) 2ch - USB 2.0 interface 2ch - SD interface 2ch - AD converter 2ch Useful links: ------------- Links: https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rz-mpus/rzfive-risc-v-general-purpose-microprocessors-risc-v-cpu-core-andes-ax45mp-single-10-ghz-2ch-gigabit-ethernet Links: http://www.andestech.com/en/products-solutions/andescore-processors/riscv-ax45mp/ Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Anup Patel <anup@brainfault.org>
		
			
				
	
	
		
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			49 lines
		
	
	
		
			835 B
		
	
	
	
		
			Plaintext
		
	
	
	
	
	
# SPDX-License-Identifier: BSD-2-Clause
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config PLATFORM_GENERIC
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	bool
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	select FDT
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	select FDT_DOMAIN
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	select FDT_PMU
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	default y
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if PLATFORM_GENERIC
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config PLATFORM_GENERIC_NAME
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	string "Platform default name"
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	default "Generic"
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config PLATFORM_GENERIC_MAJOR_VER
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	int "Platform major version"
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	range 0 65535
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	default 0
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config PLATFORM_GENERIC_MINOR_VER
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	int "Platform minor version"
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	range 0 65535
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	default 1
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config PLATFORM_ALLWINNER_D1
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	bool "Allwinner D1 support"
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	depends on FDT_IRQCHIP_PLIC
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	default n
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config PLATFORM_ANDES_AE350
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	bool "Andes AE350 support"
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	default n
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config PLATFORM_RENESAS_RZFIVE
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	bool "Renesas RZ/Five support"
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	default n
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config PLATFORM_SIFIVE_FU540
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	bool "SiFive FU540 support"
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	default n
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config PLATFORM_SIFIVE_FU740
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	bool "SiFive FU740 support"
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	depends on FDT_RESET && FDT_I2C
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	default n
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endif
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