forked from Mirrors/opensbi
2428987cc0
RISC-V privilege specification does not specify how to encode the event ID. Therefore, each platform is allowed to customize its own encoding rule. The common encoding methods are as follow, directly assigning a number to an event, or every bit in the mphmevent CSR controls one specified event or mixes the above two methods. To enable OpenSBI to support the above three encoding methods simultaneously, this patch repurpose the dt property "riscv,raw-event-to-mhpmcounters". The "riscv,raw-event-to-mhpmcounters" will describes the one or multiple raw events that could be counted by a set of counters. But, the column number of "riscv,raw-event-to-mhpmcounters" is extended from 2 to 3. The 1st column (64bit) is the ID of the raw events. The 2nd column (64bit) represents a select_mask now to represent the bits used for event ID encoding. If a platform directly encodes each raw PMU event as a unique ID, the value of select_mask will be 0xffffffff_ffffffff. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Atish Patra<atishp@rivosinc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
118 lines
3.2 KiB
C
118 lines
3.2 KiB
C
// SPDX-License-Identifier: BSD-2-Clause
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/*
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* fdt_pmu.c - Flat Device Tree PMU helper routines
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*
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* Copyright (c) 2021 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Atish Patra <atish.patra@wdc.com>
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*/
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#include <libfdt.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_pmu.h>
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#include <sbi_utils/fdt/fdt_helper.h>
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#define FDT_PMU_HW_EVENT_MAX (SBI_PMU_HW_EVENT_MAX * 2)
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struct fdt_pmu_hw_event_select {
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uint32_t eidx;
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uint64_t select;
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};
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static struct fdt_pmu_hw_event_select fdt_pmu_evt_select[FDT_PMU_HW_EVENT_MAX] = {0};
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static uint32_t hw_event_count;
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uint64_t fdt_pmu_get_select_value(uint32_t event_idx)
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{
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int i;
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struct fdt_pmu_hw_event_select *event;
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for (i = 0; i < SBI_PMU_HW_EVENT_MAX; i++) {
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event = &fdt_pmu_evt_select[i];
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if (event->eidx == event_idx)
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return event->select;
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}
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return 0;
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}
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int fdt_pmu_fixup(void *fdt)
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{
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int pmu_offset;
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struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
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if (!fdt)
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return SBI_EINVAL;
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pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
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if (pmu_offset < 0)
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return SBI_EFAIL;
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fdt_delprop(fdt, pmu_offset, "riscv,event-to-mhpmcounters");
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fdt_delprop(fdt, pmu_offset, "riscv,event-to-mhpmevent");
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fdt_delprop(fdt, pmu_offset, "riscv,raw-event-to-mhpmcounters");
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if (!sbi_hart_has_feature(scratch, SBI_HART_HAS_SSCOFPMF))
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fdt_delprop(fdt, pmu_offset, "interrupts-extended");
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return 0;
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}
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int fdt_pmu_setup(void *fdt)
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{
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int i, pmu_offset, len, result;
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const u32 *event_val;
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const u32 *event_ctr_map;
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struct fdt_pmu_hw_event_select *event;
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uint64_t raw_selector, select_mask;
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u32 event_idx_start, event_idx_end, ctr_map;
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if (!fdt)
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return SBI_EINVAL;
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pmu_offset = fdt_node_offset_by_compatible(fdt, -1, "riscv,pmu");
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if (pmu_offset < 0)
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return SBI_EFAIL;
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event_ctr_map = fdt_getprop(fdt, pmu_offset, "riscv,event-to-mhpmcounters", &len);
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if (!event_ctr_map || len < 8)
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return SBI_EFAIL;
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len = len / (sizeof(u32) * 3);
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for (i = 0; i < len; i++) {
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event_idx_start = fdt32_to_cpu(event_ctr_map[3 * i]);
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event_idx_end = fdt32_to_cpu(event_ctr_map[3 * i + 1]);
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ctr_map = fdt32_to_cpu(event_ctr_map[3 * i + 2]);
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sbi_pmu_add_hw_event_counter_map(event_idx_start, event_idx_end, ctr_map);
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}
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event_val = fdt_getprop(fdt, pmu_offset, "riscv,event-to-mhpmevent", &len);
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if (!event_val || len < 8)
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return SBI_EFAIL;
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len = len / (sizeof(u32) * 3);
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for (i = 0; i < len; i++) {
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event = &fdt_pmu_evt_select[hw_event_count];
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event->eidx = fdt32_to_cpu(event_val[3 * i]);
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event->select = fdt32_to_cpu(event_val[3 * i + 1]);
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event->select = (event->select << 32) | fdt32_to_cpu(event_val[3 * i + 2]);
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hw_event_count++;
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}
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event_val = fdt_getprop(fdt, pmu_offset, "riscv,raw-event-to-mhpmcounters", &len);
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if (!event_val || len < 20)
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return SBI_EFAIL;
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len = len / (sizeof(u32) * 5);
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for (i = 0; i < len; i++) {
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raw_selector = fdt32_to_cpu(event_val[5 * i]);
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raw_selector = (raw_selector << 32) | fdt32_to_cpu(event_val[5 * i + 1]);
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select_mask = fdt32_to_cpu(event_val[5 * i + 2]);
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select_mask = (select_mask << 32) | fdt32_to_cpu(event_val[5 * i + 3]);
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ctr_map = fdt32_to_cpu(event_val[5 * i + 4]);
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result = sbi_pmu_add_raw_event_counter_map(raw_selector, select_mask, ctr_map);
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if (!result)
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hw_event_count++;
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}
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return 0;
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}
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