forked from Mirrors/opensbi

RISC-V SBI v0.3 specification defines a set of firmware events that can provide additional information about the current firmware context. All of the firmware event monitoring are enabled now. The firmware events must be defined as raw perf event with MSB set as specified in the specification. Reviewed-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
283 lines
6.0 KiB
C
283 lines
6.0 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2019 Western Digital Corporation or its affiliates.
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*
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* Authors:
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* Anup Patel <anup.patel@wdc.com>
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* Nick Kossifidis <mick@ics.forth.gr>
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_atomic.h>
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#include <sbi/riscv_barrier.h>
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#include <sbi/sbi_bitops.h>
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#include <sbi/sbi_domain.h>
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#include <sbi/sbi_error.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_hsm.h>
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#include <sbi/sbi_init.h>
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#include <sbi/sbi_ipi.h>
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#include <sbi/sbi_platform.h>
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#include <sbi/sbi_pmu.h>
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#include <sbi/sbi_string.h>
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#include <sbi/sbi_tlb.h>
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struct sbi_ipi_data {
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unsigned long ipi_type;
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};
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static unsigned long ipi_data_off;
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static const struct sbi_ipi_device *ipi_dev = NULL;
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static const struct sbi_ipi_event_ops *ipi_ops_array[SBI_IPI_EVENT_MAX];
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static int sbi_ipi_send(struct sbi_scratch *scratch, u32 remote_hartid,
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u32 event, void *data)
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{
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int ret;
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struct sbi_scratch *remote_scratch = NULL;
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struct sbi_ipi_data *ipi_data;
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const struct sbi_ipi_event_ops *ipi_ops;
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if ((SBI_IPI_EVENT_MAX <= event) ||
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!ipi_ops_array[event])
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return SBI_EINVAL;
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ipi_ops = ipi_ops_array[event];
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remote_scratch = sbi_hartid_to_scratch(remote_hartid);
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if (!remote_scratch)
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return SBI_EINVAL;
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ipi_data = sbi_scratch_offset_ptr(remote_scratch, ipi_data_off);
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if (ipi_ops->update) {
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ret = ipi_ops->update(scratch, remote_scratch,
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remote_hartid, data);
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if (ret < 0)
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return ret;
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}
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/*
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* Set IPI type on remote hart's scratch area and
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* trigger the interrupt
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*/
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atomic_raw_set_bit(event, &ipi_data->ipi_type);
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smp_wmb();
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if (ipi_dev && ipi_dev->ipi_send)
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ipi_dev->ipi_send(remote_hartid);
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sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_SENT);
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if (ipi_ops->sync)
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ipi_ops->sync(scratch);
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return 0;
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}
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/**
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* As this this function only handlers scalar values of hart mask, it must be
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* set to all online harts if the intention is to send IPIs to all the harts.
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* If hmask is zero, no IPIs will be sent.
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*/
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int sbi_ipi_send_many(ulong hmask, ulong hbase, u32 event, void *data)
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{
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int rc;
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ulong i, m;
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struct sbi_domain *dom = sbi_domain_thishart_ptr();
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struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
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if (hbase != -1UL) {
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rc = sbi_hsm_hart_interruptible_mask(dom, hbase, &m);
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if (rc)
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return rc;
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m &= hmask;
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/* Send IPIs */
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for (i = hbase; m; i++, m >>= 1) {
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if (m & 1UL)
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sbi_ipi_send(scratch, i, event, data);
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}
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} else {
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hbase = 0;
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while (!sbi_hsm_hart_interruptible_mask(dom, hbase, &m)) {
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/* Send IPIs */
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for (i = hbase; m; i++, m >>= 1) {
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if (m & 1UL)
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sbi_ipi_send(scratch, i, event, data);
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}
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hbase += BITS_PER_LONG;
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}
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}
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return 0;
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}
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int sbi_ipi_event_create(const struct sbi_ipi_event_ops *ops)
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{
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int i, ret = SBI_ENOSPC;
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if (!ops || !ops->process)
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return SBI_EINVAL;
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for (i = 0; i < SBI_IPI_EVENT_MAX; i++) {
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if (!ipi_ops_array[i]) {
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ret = i;
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ipi_ops_array[i] = ops;
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break;
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}
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}
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return ret;
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}
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void sbi_ipi_event_destroy(u32 event)
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{
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if (SBI_IPI_EVENT_MAX <= event)
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return;
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ipi_ops_array[event] = NULL;
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}
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static void sbi_ipi_process_smode(struct sbi_scratch *scratch)
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{
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csr_set(CSR_MIP, MIP_SSIP);
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}
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static struct sbi_ipi_event_ops ipi_smode_ops = {
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.name = "IPI_SMODE",
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.process = sbi_ipi_process_smode,
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};
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static u32 ipi_smode_event = SBI_IPI_EVENT_MAX;
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int sbi_ipi_send_smode(ulong hmask, ulong hbase)
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{
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return sbi_ipi_send_many(hmask, hbase, ipi_smode_event, NULL);
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}
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void sbi_ipi_clear_smode(void)
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{
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csr_clear(CSR_MIP, MIP_SSIP);
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}
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static void sbi_ipi_process_halt(struct sbi_scratch *scratch)
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{
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sbi_hsm_hart_stop(scratch, TRUE);
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}
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static struct sbi_ipi_event_ops ipi_halt_ops = {
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.name = "IPI_HALT",
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.process = sbi_ipi_process_halt,
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};
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static u32 ipi_halt_event = SBI_IPI_EVENT_MAX;
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int sbi_ipi_send_halt(ulong hmask, ulong hbase)
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{
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return sbi_ipi_send_many(hmask, hbase, ipi_halt_event, NULL);
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}
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void sbi_ipi_process(void)
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{
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unsigned long ipi_type;
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unsigned int ipi_event;
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const struct sbi_ipi_event_ops *ipi_ops;
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struct sbi_scratch *scratch = sbi_scratch_thishart_ptr();
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struct sbi_ipi_data *ipi_data =
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sbi_scratch_offset_ptr(scratch, ipi_data_off);
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u32 hartid = current_hartid();
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sbi_pmu_ctr_incr_fw(SBI_PMU_FW_IPI_RECVD);
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if (ipi_dev && ipi_dev->ipi_clear)
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ipi_dev->ipi_clear(hartid);
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ipi_type = atomic_raw_xchg_ulong(&ipi_data->ipi_type, 0);
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ipi_event = 0;
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while (ipi_type) {
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if (!(ipi_type & 1UL))
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goto skip;
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ipi_ops = ipi_ops_array[ipi_event];
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if (ipi_ops && ipi_ops->process)
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ipi_ops->process(scratch);
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skip:
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ipi_type = ipi_type >> 1;
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ipi_event++;
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};
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}
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void sbi_ipi_raw_send(u32 target_hart)
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{
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if (ipi_dev && ipi_dev->ipi_send)
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ipi_dev->ipi_send(target_hart);
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}
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const struct sbi_ipi_device *sbi_ipi_get_device(void)
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{
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return ipi_dev;
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}
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void sbi_ipi_set_device(const struct sbi_ipi_device *dev)
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{
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if (!dev || ipi_dev)
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return;
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ipi_dev = dev;
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}
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int sbi_ipi_init(struct sbi_scratch *scratch, bool cold_boot)
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{
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int ret;
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struct sbi_ipi_data *ipi_data;
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if (cold_boot) {
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ipi_data_off = sbi_scratch_alloc_offset(sizeof(*ipi_data));
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if (!ipi_data_off)
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return SBI_ENOMEM;
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ret = sbi_ipi_event_create(&ipi_smode_ops);
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if (ret < 0)
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return ret;
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ipi_smode_event = ret;
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ret = sbi_ipi_event_create(&ipi_halt_ops);
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if (ret < 0)
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return ret;
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ipi_halt_event = ret;
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} else {
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if (!ipi_data_off)
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return SBI_ENOMEM;
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if (SBI_IPI_EVENT_MAX <= ipi_smode_event ||
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SBI_IPI_EVENT_MAX <= ipi_halt_event)
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return SBI_ENOSPC;
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}
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ipi_data = sbi_scratch_offset_ptr(scratch, ipi_data_off);
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ipi_data->ipi_type = 0x00;
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/*
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* Initialize platform IPI support. This will also clear any
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* pending IPIs for current/calling HART.
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*/
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ret = sbi_platform_ipi_init(sbi_platform_ptr(scratch), cold_boot);
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if (ret)
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return ret;
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/* Enable software interrupts */
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csr_set(CSR_MIE, MIP_MSIP);
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return 0;
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}
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void sbi_ipi_exit(struct sbi_scratch *scratch)
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{
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/* Disable software interrupts */
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csr_clear(CSR_MIE, MIP_MSIP);
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/* Process pending IPIs */
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sbi_ipi_process();
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/* Platform exit */
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sbi_platform_ipi_exit(sbi_platform_ptr(scratch));
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}
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