forked from Mirrors/opensbi
3d1f53b173
Add a new Andes SBI call to free a PMA entry, and reset the memory attributes for the corresponding NAPOT region. Signed-off-by: Ben Zong-You Xie <ben717@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
65 lines
1.5 KiB
C
65 lines
1.5 KiB
C
// SPDX-License-Identifier: BSD-2-Clause
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/*
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* Copyright (C) 2023 Renesas Electronics Corp.
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*
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*/
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#include <andes/andes.h>
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#include <andes/andes_sbi.h>
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#include <andes/andes_pma.h>
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#include <sbi/riscv_asm.h>
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#include <sbi/sbi_error.h>
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enum sbi_ext_andes_fid {
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SBI_EXT_ANDES_FID0 = 0, /* Reserved for future use */
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SBI_EXT_ANDES_IOCP_SW_WORKAROUND,
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SBI_EXT_ANDES_PMA_PROBE,
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SBI_EXT_ANDES_PMA_SET,
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SBI_EXT_ANDES_PMA_FREE,
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};
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static bool andes_cache_controllable(void)
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{
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return (((csr_read(CSR_MICM_CFG) & MICM_CFG_ISZ_MASK) ||
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(csr_read(CSR_MDCM_CFG) & MDCM_CFG_DSZ_MASK)) &&
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(csr_read(CSR_MMSC_CFG) & MMSC_CFG_CCTLCSR_MASK) &&
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(csr_read(CSR_MCACHE_CTL) & MCACHE_CTL_CCTL_SUEN_MASK) &&
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misa_extension('U'));
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}
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static bool andes_iocp_disabled(void)
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{
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return (csr_read(CSR_MMSC_CFG) & MMSC_IOCP_MASK) ? false : true;
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}
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static bool andes_apply_iocp_sw_workaround(void)
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{
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return andes_cache_controllable() & andes_iocp_disabled();
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}
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int andes_sbi_vendor_ext_provider(long funcid,
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struct sbi_trap_regs *regs,
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struct sbi_ecall_return *out,
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const struct fdt_match *match)
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{
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int ret = 0;
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switch (funcid) {
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case SBI_EXT_ANDES_IOCP_SW_WORKAROUND:
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out->value = andes_apply_iocp_sw_workaround();
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break;
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case SBI_EXT_ANDES_PMA_PROBE:
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out->value = andes_sbi_probe_pma();
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break;
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case SBI_EXT_ANDES_PMA_SET:
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ret = andes_sbi_set_pma(regs->a0, regs->a1, regs->a2);
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break;
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case SBI_EXT_ANDES_PMA_FREE:
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ret = andes_sbi_free_pma(regs->a0);
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break;
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default:
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ret = SBI_ENOTSUPP;
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}
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return ret;
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}
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