Himanshu Chauhan 20ca19ab03 include: sbi: Add TINFO debug trigger CSR ...

Add the missing TINFO debug trigger CSR.

Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com>
Reviewed-by: Anup Patel <anup@brainfault.org>

2024-01-10 09:43:33 +05:30

..

sbi

include: sbi: Add TINFO debug trigger CSR

2024-01-10 09:43:33 +05:30

sbi_utils

lib: utils/timer: mtimer: only use regname for aclint

2023-12-27 11:57:33 +05:30