forked from Mirrors/opensbi

Move Andes PLICSW ipi device to fdt ipi framework, this patch is based on Leo's modified IPI scheme on PLICSW. Current IPI scheme uses bit 0 of pending reigster on PLICSW to send IPI from hart 0 to hart 7, but bit 0 needs to be hardwired to 0 according to spec. After some investigation, self-IPI seems to be seldom or never used, so we re-order the IPI scheme to support 8 core platforms. dts example (Quad-core AX45MP): plicsw: interrupt-controller@e6400000 { compatible = "andestech,plicsw"; reg = <0x00000000 0xe6400000 0x00000000 0x00400000>; interrupts-extended = <&CPU0_intc 3 &CPU1_intc 3 &CPU2_intc 3 &CPU3_intc 3>; interrupt-controller; #address-cells = <2>; #interrupt-cells = <2>; }; Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
33 lines
448 B
Plaintext
33 lines
448 B
Plaintext
# SPDX-License-Identifier: BSD-2-Clause
|
|
|
|
menu "IPI Device Support"
|
|
|
|
config FDT_IPI
|
|
bool "FDT based ipi drivers"
|
|
depends on FDT
|
|
default n
|
|
|
|
if FDT_IPI
|
|
|
|
config FDT_IPI_MSWI
|
|
bool "ACLINT MSWI FDT driver"
|
|
select IPI_MSWI
|
|
default n
|
|
|
|
config FDT_IPI_PLICSW
|
|
bool "Andes PLICSW FDT driver"
|
|
select IPI_PLICSW
|
|
default n
|
|
|
|
endif
|
|
|
|
config IPI_MSWI
|
|
bool "ACLINT MSWI support"
|
|
default n
|
|
|
|
config IPI_PLICSW
|
|
bool "Andes PLICSW support"
|
|
default n
|
|
|
|
endmenu
|