Commit Graph

9 Commits

Author SHA1 Message Date
Yu Chien Peter Lin
ef9f02e7fb lib: utils/timer: Add Andes fdt timer support
Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.

dts example (Quad-core AX45MP):

  cpus {
      ...
      timebase-frequency = <0x3938700>;
      ...
  }
  soc {
      ...
      plmt0@e6000000 {
          compatible = "andestech,plmt0";
          reg = <0x00 0xe6000000 0x00 0x100000>;
          interrupts-extended = <&cpu0_intc 0x07
                                 &cpu1_intc 0x07
                                 &cpu2_intc 0x07
                                 &cpu3_intc 0x07>;
      };
      ...
  }

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23 10:26:39 +05:30
Yu Chien Peter Lin
dcdaf30274 lib: sbi: Add sbi_domain_root_add_memrange() API
This patch generalizes the logic to add a memory range with desired
alignment and flags of consecutive regions to the root domain.

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23 10:21:21 +05:30
Anup Patel
013dbb3a60 lib: utils/timer: Use kconfig for enabling/disabling drivers
We update timer drivers makefile to use kconfig for enabling/disabling
drivers. To avoid compile errors, we also enable appropriate timer
drivers for each platform.

Signed-off-by: Anup Patel <apatel@ventanamicro.com>
Tested-by: Andrew Jones <ajones@ventanamicro.com>
Acked-by: Atish Patra <atishp@rivosinc.com>
Tested-by: Atish Patra <atishp@rivosinc.com>
2022-08-08 09:33:37 +05:30
Anup Patel
12e7af9ab7 lib: sbi: Add timer frequency to struct sbi_timer_device
Generic mdelay() and udelay() functions can be provided by the
sbi_timer framework if timer frequency is available in the timer
instance provided by the platform support or timer driver.

This patch adds timer frequency (timer_freq) member in the
struct sbi_timer_device for above purpose.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-09-26 19:52:10 +05:30
Anup Patel
7aa6c9aa96 lib: utils/timer: Simplify MTIMER synchronization
We simplify MTIMER synchronization as follows:

1) Detect MTIMER devices with unique (or non-shared) MTIME
   register at boot-time
2) Select first MTIMER device with no associated HART as our
   reference MTIMER device
3) Only synchronize MTIMER devices with unique (or non-shared)
   MTIME register using reference MTIMER device
4) Directly update the MTIME register at time of synchronization
   because MTIME is a read/write register.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-14 09:07:42 +05:30
Anup Patel
e0d1b9db8a lib: utils/timer: Allow separate base addresses for MTIME and MTIMECMP
We extend the ACLINT library to support separate base addresses
for MTIME and MTIMECMP registers.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-08-14 09:02:33 +05:30
Anup Patel
4519e29c51 lib: utils/timer: Add ACLINT MTIMER library
We add common ACLINT MTIMER library similar to the CLINT library
so that OpenSBI platforms can use it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Xiang W <wxjstz@126.com>
2021-06-24 09:38:47 +05:30
Anup Patel
559a8f1d3b lib: sbi: Simplify timer platform operations
Instead of having timer_value(), timer_event_start(), and
timer_event_stop() callbacks in platform operations, it will
be much simpler for timer driver to directly register these
operations as device to the sbi_timer implementation.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2021-04-28 17:00:49 +05:30
Anup Patel
8ff2b94ea1 lib: utils: Add simple FDT timer framework
We add simple timer framework which will select and use timer driver
based on details in FDT passed by previous booting stage.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-01 09:57:55 +05:30