The arguments/parameters of __sbi_hfence_gvma_vmid_gpa() and
__sbi_hfence_vvma_asid_va() functions are swapped so we fix it.
Currently, we did not face any issues because QEMU does a full
TLB flush for all HFENCE instructions.
We also improve documentation of HFENCE.GVMA and HFENCE.VVMA
instruction encoding.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
To support RISC-V hypervisor v0.6.1, we:
1. Don't need to explicitly forward WFI traps from VS/VU-mode
2. Have to delegate virtual instruction trap to HS-mode
3. Have to update trap redirection for changes in HSTATUS CSR
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
It is not mandatory for a RISC-V systems to implement all PMP
regions so we have to check all PMPADDRx CSRs to determine excat
number of supported PMP regions.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
This patch does few cosmetic improvements to HART feature detection:
1. Remove sbi_ perfix from HART feature detection functions
because all local/static functions in sbi_hart.c don't have
sbi_ prefix
2. Remove sbi_hart_set_feature() because it's quite small and
local/static in sbi_hart.c
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
It makes more sense to have scratch pointer as parameter in
HART feature APIs because:
1. We already have scratch pointer at places where these APIs
are used.
2. This is consistent with lot of other APIs in sbi_hart.h
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
On platforms with continuous HART ids starting from zero:
0 <= boot HART id < platform HART count
The above co-relation of boot HART id and platform HART count
is true for most RISC-V platfors so it's better to print platform
HART count just before boot HART id.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We do following improvements for get_feature_str():
1. We should return "none" from get_feature_str() no features
available instead of sbi_boot_prints() explicitly handling
failure.
2. We don't need to return failure (just like misa_xlen())
because we are returning "none" for no features and we are
truncating output when space is not available.
3. Based on 1 and 2, the sbi_boot_prints() can be further
simplified.
4. No need for two char[] in sbi_boot_prints()
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We should detect HART features in sbi_hart_init() before
mstatus_init(), delegate_traps() and pmp_init().
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Currently, unprivileged access functions uses few additional instructions
which are redundant. It also uses specific registers which are not necessary.
Remove those additional instructions and let the compiler choose the
registers.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
We have now clear distinction between platform and hart features.
Modify the boot print messages to print hart specific features in
a string format.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
We have now clear distinction between platform and hart features.
Modify the boot print messages to print platform features in a string
format. In the process, this patch moved relatively larger functions
to its own file from platform.h header file.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
As per the RISC-V specification, time value can be obtained from a time
CSR implemented in hardware or a MMIO based IP block. Qemu virt machine
already supports timer csr while CLINT provides the timer for other
platforms.
Implement a hart specific timer feature that can be detected at runtime.
As CSR based timer implementation are faster than MMIO address based, it
is always preferred over MMIO based one.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
PMP & performance counters belong to a hart rather than a platform.
In addition to that, these features enable reading/writing from a
particular csr. Thus, they can be detected and set at runtime rather
than compile time.
Move PMP/MCOUNTEREN/SCOUNTEREN features to hart and detect them at runtime.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
There may be some features which are hart specific rather than a platform
specific feature. Add a framework to support that.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
There may be few common mathematics helper functions which can be used
anywhere in OpenSBI project.
Add a separate math helper function file to add these functions.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Unprivileged trap handler can be reused for any cases where the executing
code expects a trap.
Rename it to "expected" trap handler as it will be used in other cases in
future.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Tested-by: Jonathan Balkind <jbalkind@cs.princeton.edu>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
The RISC-V ISA string does not follow alphabetical order. Instead,
we have a RISC-V specific ordering of extensions in the RISC-V ISA
string. This patch improves misa_string() implementation to return
a valid RISC-V ISA string.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The HFENCE VVMA instructions flushes TLB based on the VMID
present in HGATP CSR. To handle this, we get the current
VMID for SBI HFENCE VVMA call and we use this current VMID
to do remote TLB HFENCE VVMA on desired set of HARTs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Now that we have generic platform which detects hart count from
DTB, we should print platform hart count at boot time.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We can achieve shutdown, cold reboot, and warm reboot using just
one sbi_platform callback so we combine system_reboot() and
system_shutdown() callbacks into one system_reset() callback.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The default (usually last) PMP region provides S-mode access to
complete memory range not covered by other PMP regions.
Currently, the default PMP region is described as platform specific
PMP region which is not appropriate because all platforms need it
and default PMP region should be part of generic library.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Ideally, the SBI implementation ID for OpenSBI should always be
0x1 (as mentioned in SBI v0.2 spec) but external firmware (such
as EDK2) which use OpenSBI as library might want to override the
SBI implementation ID with their custom implementation ID.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Enable vector context in mstatus by updating the corresponding bits
in mstatus if vector extension is supported by the hart.
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This patch removes scratch parameter from sbi_dprintf() function
because sbi_dprintf() can use sbi_scratch_thishart_ptr() to get
current HART scratch space.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The sbi_ipi_send_many() should get current HART scratch pointer
on it's own using eventually hence removing scratch parameter from
sbi_tlb_request().
Signed-off-by: Anup Patel <anup.patel@wdc.com>
The patch adds sbi_scratch_last_hartid() API which returns
last HART id having a scratch space. We can use this new API
to optimize places where we iterate over HART id from 0 to
SBI_HARTMASK_MAX_BITS.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We should remove the "arch_" prefix from atomic xchg() and cmpxchg()
function names to have consistent naming of all atomic functions.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The priv parameter in hart_start() platform callback is redundant hence
we remove it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch simplify sbi_trap_handler() API as follows:
1. Remove current hartid local variable because sbi_trap_handler()
itself does not need it.
2. Remove scratch parameter because none of the functions directly
called by sbi_trap_handler() require it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We remove mcause, scratch and hartid parameters from various
functions for ecall handling because we can always get current
HART id and current scratch pointer using just one CSR access.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We remove mcause, scratch and hartid parameters from various functions
for misaligned load/store handling because we can always get current
HART id and current scratch pointer using just one CSR access.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We remove mcause, scratch and hartid parameters from various
functions for illegal instruction handling because we can always
get current HART id and current scratch pointer using just one
CSR access.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We remove scratch and hartid parameter from various functions
for CSR emulation because we can always get current HART id
and current scratch pointer using just one CSR access.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The scratch parameter of sbi_trap_redirect() is not used hence we
remove it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The scratch parameter of unpriv load/store functions is now redundant
hence we remove it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
This patch optimize unpriv load/store implementation by having
dedicated unpriv trap handler (just like KVM RISC-V).
As a result of this optimization:
1. We have reduced roughly 13+ instruction in all unpriv load/store
functions. The reduced instruction also include two function calls.
2. Per-HART trap info pointer in scratch space is now redundant
hence removed.
3. The sbi_trap_handler() is now much cleaner because we don't have
to handle unpriv load/store traps.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
HSM_STOP will trigger multiple executions of sbi_init, atomic_add_return may
trigger coldboot_lottery overflow
Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
Commit 71d2b837c4 (lib: Move all coldboot wait APIs to sbi_init.c)
caused a regression while moving the code from sbi_hart.c to sbi_init.c.
As per original commit text, WFI can be implemented as a NOP according
to the RISC-V privilege specification. Software should ensure that
relevant interrupt pending bits are set. Otherwise, loop back to WFI.
Fix the regression by applying the original patch to sbi_init.c.
Fixes: 71d2b837c4 ("lib: Move all coldboot wait APIs to sbi_init.c")
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
The original code does not prevent the following scenarios:
> sbi_ecall_register_extension(ext1); /* extension id (70-80) */
> sbi_ecall_register_extension(ext2); /* extension id (50-100) */
Signed-off-by: Xiang Wang <merle@hardenedlinux.org>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
A platform can have discontinuous and/or sparse HART ids so we
cannot always assume a set of HARTs with continuous HART ids.
This patch adds support for discontinuous and sparse HART ids by
introducing HART index to HART id table. This table has platform
hart_count entries and it maps HART index to HART id.
The HART index to HART id table has only two restrictions:
1. HART index < sbi_platform hart_count
2. HART id < SBI_HARTMASK_MAX_BITS
Example1:
Let's say we have a platform with 2 HART ids 11 and 22, for such a
a platform:
hart_count = 2
hart_index2id[0] = 11
hart_index2id[1] = 22
Example2:
Let's say we have a platform with 5 HARTs ids 0, 1, 2, 3, and 4
but out of these HART with id 0 is not usable so for such a platform:
hart_count = 5
hart_index2id[0] = -1U
hart_index2id[1] = 1
hart_index2id[2] = 2
hart_index2id[3] = 3
hart_index2id[4] = 4
OR
hart_count = 4
hart_index2id[0] = 1
hart_index2id[1] = 2
hart_index2id[2] = 3
hart_index2id[3] = 4
With HART index to HART id table in place, the hart_disabled()
callback is now redundant so we remove it as well.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We don't need to use sbi_platform_hart_count() in sbi_init and
sbi_scratch because checking sbi_platform_hart_disabled() or
return value of sbi_hartid_to_scratch() is sufficient.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Checking return value of sbi_hartid_to_scratch() is sufficient
so no need to explicitly check for disabled HART using the
sbi_platform_hart_disabled() API.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
The scratch parameter in sbi_hsm_hart_started_mask() API is now
redundant hence removing it.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
We remove usage of sbi_platform_hart_count() API from sbi_hsm
so that discontinuous and sparse HART ids can be supported.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
As a step towards supporting discontinuous and sparse HART ids, we
don't set hartid_to_scratch table for disabled HARTs.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
