Commit Graph

10 Commits

Author SHA1 Message Date
Xiang W
11bf49b444 lib: sbi: Fix __atomic_op_bit_ord and comments
The original code returns the value of the word before modification.
When modifying the upper 32 bits under RV64, the value returned via
int return will have no meaning. Corrected to return the value of the
bit. And modify the function description.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2023-12-08 13:47:31 +05:30
Xiang W
6b9a849482 lib: sbi: Remove xchg/cmpxchg implemented via lr/sc
lr/sc is part of the A extension. If the A extension is not supported,
lr/sc cannot be used. So remove xchg/cmpxchg.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
2023-12-08 10:54:35 +05:30
Xiang W
70ffc3e2e6 lib: sbi: fix atomic_add_return
The unsigned length may be 4 bytes or 8 bytes, amoadd.w only applies
to 4 bytes hence this patch.

Signed-off-by: Xiang W <wxjstz@126.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-09 18:51:02 +05:30
Anup Patel
5b6957eed7 include: Use more consistent name for atomic xchg() and cmpxchg()
We should remove the "arch_" prefix from atomic xchg() and cmpxchg()
function names to have consistent naming of all atomic functions.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-28 13:32:38 +05:30
Bin Meng
650c0e525c lib: sbi: Fix coding style issues
This fixes various coding style issues found in the SBI codes.
No functional changes.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-10 10:27:28 +05:30
Anup Patel
00d332bbe7 include: Move bits related defines and macros to sbi_bitops.h
The right location for all bits related defines and macros is
sbi_bitops.h hence this patch. With this patch, the sbi_bits.h
is redundant so we remove it.

Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-08 11:06:18 +05:30
Atish Patra
c3b3b8f43b lib: Fix typo in atomic exchange functions
There is a typo in atomic operations code which prevents the
usage of riscv atomic instructions even if it is supported.

Fix the typo.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-02-22 10:04:38 +05:30
Atish Patra
6bd1512024 lib: Support atomic swap instructions
If compiler supports riscv atomic instructions, we should
use them instead of legacy gcc built-in macros
__sync_lock_test_and_set in atomic exchange functions.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
2019-08-31 13:13:47 +05:30
Atish Patra
f6e13e0dd3 lib: Provide an atomic exchange function unsigned long
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Signed-off-by: Atish Patra <atish.patra@wdc.com>
2019-08-16 08:42:52 +05:30
Atish Patra
749b0b0932 lib: Move sbi core library to lib/sbi
Signed-off-by: Atish Patra <atish.patra@wdc.com>
Acked-by: Anup Patel <anup.patel@wdc.com>
2019-06-19 09:48:51 +05:30