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lib: irqchip/plic: Fix maximum priority threshold value

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As per the PLIC specification, maximum priority threshold value is 0x7.
Even though, writing a higher value doesn't cause any error in qemu
hifive unleashed, there may be some implementation which checks the upper
and may result in an illegal access.

Signed-off-by: Atish Patra <atish.patra@wdc.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Anup Patel <anup.patel@wdc.com>
This commit is contained in:
Atish Patra
2020-04-03 11:13:08 -07:00
committed by Anup Patel
parent e5a7f556ce
commit f281de885e
1 changed files with 2 additions and 2 deletions
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4
lib/utils/irqchip/plic.c
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@@ -66,11 +66,11 @@ int plic_warm_irqchip_init(u32 target_hart, int m_cntx_id, int s_cntx_id)
/* By default, disable M-mode threshold */ /* By default, disable M-mode threshold */
if (m_cntx_id > -1) if (m_cntx_id > -1)
plic_set_thresh(m_cntx_id, 0xffffffff); plic_set_thresh(m_cntx_id, 0x7);
/* By default, disable S-mode threshold */ /* By default, disable S-mode threshold */
if (s_cntx_id > -1) if (s_cntx_id > -1)
plic_set_thresh(s_cntx_id, 0xffffffff); plic_set_thresh(s_cntx_id, 0x7);
return 0; return 0;
} }