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lib: utils/timer: Add Andes fdt timer support

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Since we can get the PLMT base address and timer frequency from
device tree, move plmt timer device to fdt timer framework.

dts example (Quad-core AX45MP):

  cpus {
      ...
      timebase-frequency = <0x3938700>;
      ...
  }
  soc {
      ...
      plmt0@e6000000 {
          compatible = "andestech,plmt0";
          reg = <0x00 0xe6000000 0x00 0x100000>;
          interrupts-extended = <&cpu0_intc 0x07
                                 &cpu1_intc 0x07
                                 &cpu2_intc 0x07
                                 &cpu3_intc 0x07>;
      };
      ...
  }

Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
This commit is contained in:
Yu Chien Peter Lin
2022-10-14 08:32:46 +08:00
committed by Anup Patel
parent 88f58a3694
commit ef9f02e7fb
13 changed files with 259 additions and 144 deletions
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2
platform/andes/ae350/platform.h
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@@ -18,8 +18,6 @@
#define AE350_PLICSW_ADDR 0xe6400000
#define AE350_PLMT_ADDR 0xe6000000
#define AE350_L2C_ADDR 0xe0500000
/*Memory and Miscellaneous Registers*/